http://channelf.se/veswiki/api.php?action=feedcontributions&user=E5frog&feedformat=atomveswiki - User contributions [en]2024-03-28T10:49:56ZUser contributionsMediaWiki 1.28.0http://channelf.se/veswiki/index.php?title=Modding&diff=720Modding2023-03-22T20:50:32Z<p>E5frog: </p>
<hr />
<div><H1>System Fairchild composite video modification</H1><br />
<H2>Working mod schematic</H2><br />
<br><br />
Construction can be used for many other machines as well.<br />
<br><br />
[[File:Channel F composite mod schematic.jpg|500px]]<br><br />
<br><br />
<H2>Example PCB:s</H2><br />
[[File:Composite mod rendered PCB top.png|400px]][[File:Composite mod rendered PCB bottom.png|400px]]<br><br />
[[File:THM mod top.png|300px]][[File:THM mod bot.png|300px]]<br><br />
<br><br />
Example of PCB:s for either SMD or THM components. <br><br />
If you want to have your own PCB made here are Gerber-files for the through hole mount version seen above:<br><br />
[[:File:Channel_F_composite_mod_Gerber_files.zip|Composite mod EagleCAD and Gerber-files (.zip 139kB)]]<br />
<pre><br />
BOM<br />
C1 1µ E2,5-6 Polarized capacitor<br />
C2 10µ E2,5-6<br />
C3 10µ E2,5-6<br />
D1 1N4148 DO35-10 Diode<br />
POT 500 Ohm TRIM_EU-S64Y<br />
Q1 BC548B TO92-EBC NPN Transistor<br />
Q2 BC558B TO92-EBC PNP<br />
Q3 BC548B TO92-EBC NPN<br />
R1 5k6 0207/10 Resistor<br />
R2 3k9 0207/10<br />
R3 270 0207/10<br />
R4 22k 0207/10<br />
R6 1k 0207/10<br />
R7 75 0207/10<br />
R8 100k 0207/10<br />
<br />
0.1 inch spaced/style header connection can be used<br />
</pre><br />
<br><br />
<br />
<H2>Hookup</H2><br />
<H3>Fairchild Video Entertainment System / Channel F</H3><br />
[[File:Channel F composite hookup point.jpg|300px]] [[File:Channel F composite video mod improve signal.jpg|400px]]<br />
<br><br><br />
Connect composite signal to the resistor by the RF box where the black clamp is placed. <br><br />
Audio can be picked directly from speaker output using about 150kOhm in series.<br><br />
To improve image quality you can desolder RF shield and remove (or just lift one leg) L2 coil and resistors R28, R25<br><br />
This will disconnect 5V from RF circuit and also disconnect it from the composite signal<br><br />
Use GND and +5V connecting from the electrolytic cap on the 5V regulator output <br><br />
<br><br />
<br><br />
<H3>Channel F II</H3><br />
[[File:Channel F II composite video modification overview.jpg|439px]] [[File:Channel F II composite mod detail.jpg|300px]] <br><br><br />
5V can be picked directly from the capacitor, here connected with red and blue wires in top right position of the circuitboard. <br><br />
One of the locations for composite signal source has been hooked up with a red clamp on a resistor by the LED. <br><br><br />
[[File:Channel F II composite video modification jumper.jpg|434px]] [[File:Channel F II mod Composite points.jpg|420px]]<br />
<br><br />
<br> You can lift the jumper in the green circle to improve video quality. <br><br />
Optional composite video hookup points are located there, marked with green dots.<br><br><br />
[[File:Channel F II composite mod audio.jpg|320px]] [[File:Channel F II mod voltage divider.jpg|460px]] <br><br />
Audio hookup is found right of the channel switch. Connect a 22kOhm and 100kOhm as a voltage divider from GND ro red dot.<br><br />
This will give an audio volume close to the one via the RF-signal. <br><br />
Green dots have a low level audio signal, if used instead you may get interference if skipping an inline resistor (R8 in schematic). <br />
<br><br><br><br />
<H3>SABA Videoplay 2</H3><br />
[[File:SABA Videoplay 2 composite video mod hookup.jpg|402px]] <br />
[[File:SABA Videoplay 2 composite mod second image.jpg|365px]]<br />
<br><br />
In this example 5V and ground is hooked up directly to the 5V regulator, composite signal is taken from capacitor pin (yellow wire).<br><br />
The white wire from the speaker is originally connected to the little RF board, connect it to the PCB instead.<br><br />
In the image you see audio hooked up with a loose resistor and capacitor instead of using the PCB.</div>E5froghttp://channelf.se/veswiki/index.php?title=File:THM_mod_top.png&diff=719File:THM mod top.png2023-03-22T20:32:57Z<p>E5frog: E5frog uploaded a new version of File:THM mod top.png</p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=File:THM_mod_bot.png&diff=718File:THM mod bot.png2023-03-22T20:32:30Z<p>E5frog: E5frog uploaded a new version of File:THM mod bot.png</p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=Modding&diff=717Modding2023-03-21T21:21:00Z<p>E5frog: </p>
<hr />
<div><H1>System Fairchild composite video modification</H1><br />
<H2>Working mod schematic</H2><br />
<br><br />
Construction can be used for many other machines as well.<br />
<br><br />
[[File:Channel F composite mod schematic.jpg|500px]]<br><br />
<br><br />
<H2>Example PCB:s</H2><br />
[[File:Composite mod rendered PCB top.png|400px]][[File:Composite mod rendered PCB bottom.png|400px]]<br><br />
[[File:THM mod top.png|300px]][[File:THM mod bot.png|293px]]<br><br />
<br><br />
Example of PCB:s for either SMD or THM components. <br><br />
If you want to have your own PCB made here are Gerber-files for the through hole mount version seen above:<br><br />
[[:File:Channel_F_composite_mod_Gerber_files.zip|Composite mod EagleCAD and Gerber-files (.zip 139kB)]]<br />
<br><br />
<br />
<H2>Hookup</H2><br />
<H3>Fairchild Video Entertainment System / Channel F</H3><br />
[[File:Channel F composite hookup point.jpg|300px]] [[File:Channel F composite video mod improve signal.jpg|400px]]<br />
<br><br><br />
Connect composite signal to the resistor by the RF box where the black clamp is placed. <br><br />
Audio can be picked directly from speaker output using about 150kOhm in series.<br><br />
To improve image quality you can desolder RF shield and remove (or just lift one leg) L2 coil and resistors R28, R25<br><br />
This will disconnect 5V from RF circuit and also disconnect it from the composite signal<br><br />
Use GND and +5V connecting from the electrolytic cap on the 5V regulator output <br><br />
<br><br />
<br><br />
<H3>Channel F II</H3><br />
[[File:Channel F II composite video modification overview.jpg|439px]] [[File:Channel F II composite mod detail.jpg|300px]] <br><br><br />
5V can be picked directly from the capacitor, here connected with red and blue wires in top right position of the circuitboard. <br><br />
One of the locations for composite signal source has been hooked up with a red clamp on a resistor by the LED. <br><br><br />
[[File:Channel F II composite video modification jumper.jpg|434px]] [[File:Channel F II mod Composite points.jpg|420px]]<br />
<br><br />
<br> You can lift the jumper in the green circle to improve video quality. <br><br />
Optional composite video hookup points are located there, marked with green dots.<br><br><br />
[[File:Channel F II composite mod audio.jpg|320px]] [[File:Channel F II mod voltage divider.jpg|460px]] <br><br />
Audio hookup is found right of the channel switch. Connect a 22kOhm and 100kOhm as a voltage divider from GND ro red dot.<br><br />
This will give an audio volume close to the one via the RF-signal. <br><br />
Green dots have a low level audio signal, if used instead you may get interference if skipping an inline resistor (R8 in schematic). <br />
<br><br><br><br />
<H3>SABA Videoplay 2</H3><br />
[[File:SABA Videoplay 2 composite video mod hookup.jpg|402px]] <br />
[[File:SABA Videoplay 2 composite mod second image.jpg|365px]]<br />
<br><br />
In this example 5V and ground is hooked up directly to the 5V regulator, composite signal is taken from capacitor pin (yellow wire).<br><br />
The white wire from the speaker is originally connected to the little RF board, connect it to the PCB instead.<br><br />
In the image you see audio hooked up with a loose resistor and capacitor instead of using the PCB.</div>E5froghttp://channelf.se/veswiki/index.php?title=File:Channel_F_composite_mod_Gerber_files.zip&diff=716File:Channel F composite mod Gerber files.zip2023-03-21T21:20:10Z<p>E5frog: E5frog uploaded a new version of File:Channel F composite mod Gerber files.zip</p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=Modding&diff=715Modding2023-03-21T21:12:13Z<p>E5frog: </p>
<hr />
<div><H1>System Fairchild composite video modification</H1><br />
<H2>Working mod schematic</H2><br />
<br><br />
Construction can be used for many other machines as well.<br />
<br><br />
[[File:Channel F composite mod schematic.jpg|500px]]<br><br />
<br><br />
<H2>Example PCB:s</H2><br />
[[File:Composite mod rendered PCB top.png|400px]][[File:Composite mod rendered PCB bottom.png|400px]]<br><br />
[[File:THM mod top.png|300px]][[File:THM mod bot.png|293px]]<br><br />
<br><br />
Example of PCB:s for either SMD or THM components. <br><br />
If you want to have your own PCB made here are Gerber-files for the through hole mount version seen above:<br><br />
[[:File:Channel_F_composite_mod_Gerber_files.zip|Composite mod Gerber-files (.zip 49kB)]]<br />
<br><br />
<br />
<H2>Hookup</H2><br />
<H3>Fairchild Video Entertainment System / Channel F</H3><br />
[[File:Channel F composite hookup point.jpg|300px]] [[File:Channel F composite video mod improve signal.jpg|400px]]<br />
<br><br><br />
Connect composite signal to the resistor by the RF box where the black clamp is placed. <br><br />
Audio can be picked directly from speaker output using about 150kOhm in series.<br><br />
To improve image quality you can desolder RF shield and remove (or just lift one leg) L2 coil and resistors R28, R25<br><br />
This will disconnect 5V from RF circuit and also disconnect it from the composite signal<br><br />
Use GND and +5V connecting from the electrolytic cap on the 5V regulator output <br><br />
<br><br />
<br><br />
<H3>Channel F II</H3><br />
[[File:Channel F II composite video modification overview.jpg|439px]] [[File:Channel F II composite mod detail.jpg|300px]] <br><br><br />
5V can be picked directly from the capacitor, here connected with red and blue wires in top right position of the circuitboard. <br><br />
One of the locations for composite signal source has been hooked up with a red clamp on a resistor by the LED. <br><br><br />
[[File:Channel F II composite video modification jumper.jpg|434px]] [[File:Channel F II mod Composite points.jpg|420px]]<br />
<br><br />
<br> You can lift the jumper in the green circle to improve video quality. <br><br />
Optional composite video hookup points are located there, marked with green dots.<br><br><br />
[[File:Channel F II composite mod audio.jpg|320px]] [[File:Channel F II mod voltage divider.jpg|460px]] <br><br />
Audio hookup is found right of the channel switch. Connect a 22kOhm and 100kOhm as a voltage divider from GND ro red dot.<br><br />
This will give an audio volume close to the one via the RF-signal. <br><br />
Green dots have a low level audio signal, if used instead you may get interference if skipping an inline resistor (R8 in schematic). <br />
<br><br><br><br />
<H3>SABA Videoplay 2</H3><br />
[[File:SABA Videoplay 2 composite video mod hookup.jpg|402px]] <br />
[[File:SABA Videoplay 2 composite mod second image.jpg|365px]]<br />
<br><br />
In this example 5V and ground is hooked up directly to the 5V regulator, composite signal is taken from capacitor pin (yellow wire).<br><br />
The white wire from the speaker is originally connected to the little RF board, connect it to the PCB instead.<br><br />
In the image you see audio hooked up with a loose resistor and capacitor instead of using the PCB.</div>E5froghttp://channelf.se/veswiki/index.php?title=File:Channel_F_composite_mod_Gerber_files.zip&diff=714File:Channel F composite mod Gerber files.zip2023-03-21T20:55:01Z<p>E5frog: </p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=File:Channel_F_composite_mod_schematic.jpg&diff=713File:Channel F composite mod schematic.jpg2023-03-21T20:49:03Z<p>E5frog: E5frog uploaded a new version of File:Channel F composite mod schematic.jpg</p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=File:THM_mod_bot.png&diff=712File:THM mod bot.png2023-03-21T20:45:20Z<p>E5frog: </p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=File:THM_mod_top.png&diff=711File:THM mod top.png2023-03-21T20:44:49Z<p>E5frog: </p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=Modding&diff=710Modding2023-03-14T14:56:52Z<p>E5frog: </p>
<hr />
<div><H1>System Fairchild composite video modification</H1><br />
<H2>Working mod schematic</H2><br />
<br><br />
Construction can be used for many other machines as well.<br />
<br><br />
[[File:Channel F composite mod schematic.jpg|600px]]<br><br />
<br><br />
<H2>Example PCB</H2><br />
[[File:Composite mod rendered PCB top.png|400px]][[File:Composite mod rendered PCB bottom.png|400px]]<br><br />
Example of PCB using SMD components. <br />
<br><br />
<br />
<H2>Hookup</H2><br />
<H3>Fairchild Video Entertainment System / Channel F</H3><br />
[[File:Channel F composite hookup point.jpg|300px]] [[File:Channel F composite video mod improve signal.jpg|400px]]<br />
<br><br><br />
Connect composite signal to the resistor by the RF box where the black clamp is placed. <br><br />
Audio can be picked directly from speaker output using about 150kOhm in series.<br><br />
To improve image quality you can desolder RF shield and remove (or just lift one leg) L2 coil and resistors R28, R25<br><br />
This will disconnect 5V from RF circuit and also disconnect it from the composite signal<br><br />
Use GND and +5V connecting from the electrolytic cap on the 5V regulator output <br><br />
<br><br />
<br><br />
<H3>Channel F II</H3><br />
[[File:Channel F II composite video modification overview.jpg|439px]] [[File:Channel F II composite mod detail.jpg|300px]] <br><br><br />
5V can be picked directly from the capacitor, here connected with red and blue wires in top right position of the circuitboard. <br><br />
One of the locations for composite signal source has been hooked up with a red clamp on a resistor by the LED. <br><br><br />
[[File:Channel F II composite video modification jumper.jpg|434px]] [[File:Channel F II mod Composite points.jpg|420px]]<br />
<br><br />
<br> You can lift the jumper in the green circle to improve video quality. <br><br />
Optional composite video hookup points are located there, marked with green dots.<br><br><br />
[[File:Channel F II composite mod audio.jpg|320px]] [[File:Channel F II mod voltage divider.jpg|460px]] <br><br />
Audio hookup is found right of the channel switch. Connect a 22kOhm and 100kOhm as a voltage divider from GND ro red dot.<br><br />
This will give an audio volume close to the one via the RF-signal. <br><br />
Green dots have a low level audio signal, if used instead you may get interference if skipping an inline resistor (R8 in schematic). <br />
<br><br><br><br />
<H3>SABA Videoplay 2</H3><br />
[[File:SABA Videoplay 2 composite video mod hookup.jpg|402px]] <br />
[[File:SABA Videoplay 2 composite mod second image.jpg|365px]]<br />
<br><br />
In this example 5V and ground is hooked up directly to the 5V regulator, composite signal is taken from capacitor pin (yellow wire).<br><br />
The white wire from the speaker is originally connected to the little RF board, connect it to the PCB instead.<br><br />
In the image you see audio hooked up with a loose resistor and capacitor instead of using the PCB.</div>E5froghttp://channelf.se/veswiki/index.php?title=File:Channel_F_composite_video_mod_improve_signal.jpg&diff=709File:Channel F composite video mod improve signal.jpg2023-03-14T14:41:34Z<p>E5frog: </p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=ROMC&diff=708ROMC2022-09-26T15:51:05Z<p>E5frog: /* The different states */</p>
<hr />
<div>To save on capsule pins the different parts in the F8 processor system communicates with the ROMC-bus.<br><br />
Instead of an address bus each device has its own Program Counter (PC). <br><br />
<br />
A Short cycle is 4 clock periods long, a Long cycle is 6 clock periods long (sometimes referred to 1.5 cycles). <br><br />
<br />
== The different states ==<br />
<br />
{| class="wikitable" style="text-align: center;"<br />
! colspan="4" |ROMC Signal functions<br />
|- <br />
| '''ROMC'''<br>'''43210'''<br />
|<br>'''HEX'''<br />
|'''Cycle'''<br>'''length'''<br />
|<br>'''Function'''<br />
|-<br />
|00000<br />
|00<br />
|S,L<br />
|Instruction Fetch. The device whose address space includes the contents of the PC0 register must <br> <br />
place on the data bus the op code addressed by PC0; then all devices increment the contents of PC0.<br />
|- <br />
|00001<br />
|01<br />
|L<br />
|The device whose address space includes the contents of the PC0 register must place on the data bus <br><br />
the contents of the memory location addressed by PC0; then all devices add the 8-bit value on the data<br><br />
bus, as as signed binary number, to PC0.<br />
|- <br />
|00010<br />
|02<br />
|L<br />
|The device whose DC0 addresses a memory word within the address space of that device must <br><br />
place on the data bus the contents of the memory location addressed by DC0; then all devices <br><br />
increment DC0.<br />
|- <br />
|00011<br />
|03<br />
|L,S<br />
|Similar to 00, except that it is used for Immediate Operand fetches (using PC0) instead of <br><br />
instruction fetches. <br />
|-<br />
|00100<br />
|04<br />
|S<br />
|Copy the contents of PC1 into PC0. <br />
|-<br />
|00101<br />
|05<br />
|L<br />
|Store the data bus contents into the memory location pointed to by DC0; increment DC0.<br />
|-<br />
|00110<br />
|06<br />
|L<br />
|Place the high order byte of DC0 on the data bus.<br />
|-<br />
|00111<br />
|07<br />
|L<br />
|Place the high order byte of PC1 on the data bus. <br />
|-<br />
|01000<br />
|08<br />
|L<br />
|All devices copy the contents of PC0 into PC1. The CPU outputs zero on the data bus in this ROMC<br><br />
state. Load the data bus into both halves of PC0, thus clearing the register. <br />
|-<br />
|01001<br />
|09<br />
|L<br />
|The device whose address space includes the contents of the DC0 register must place the low order<br><br />
byte of DC0 onto the data bus. <br />
|-<br />
|01010<br />
|0A<br />
|L<br />
|All devices add the 8-bit value on the data bus, treated as a signed binary number, to the data counter.<br />
|-<br />
|01011<br />
|0B<br />
|L<br />
|The device whose address space includes the value in PC1 must place the low order byte of PC1 on<br><br />
the data bus.<br />
|-<br />
|01100<br />
|0C<br />
|L<br />
|The device whose address space includes the contents of the PC0 register must place the contents of<br><br />
the memory word addressed by PC0 onto the data bus; then all devices move the value that has just <br><br />
been placed on the data bus into the low order byte of PC0.<br />
|-<br />
|01101<br />
|0D<br />
|S<br />
|All devices store in PC1 the current contents of PC0, incremented by 1; PC0 is unaltered.<br />
|-<br />
|01110<br />
|0E<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the contents of the word <br><br />
adressed by PC0 onto the data bus. The value on the data bus is then moved to the low order byte<br><br />
of DC0 by all devices<br />
|-<br />
|01111<br />
|0F<br />
|L<br />
|The interrupting device with highest priority must place the low order byte of the interrupt vector on the<br><br />
data bus. All devices must copy the contents of PC0 into PC1. All devices must move the contents of <br><br />
the data bus into the low order byte of PC0.<br />
|-<br />
|10000<br />
|10<br />
|L<br />
|Inhibit any modification to the interrupt priority logic.<br />
|-<br />
|10001<br />
|11<br />
|L<br />
|The device whose memory space includes the contents of PC0 must place the contents of the<br><br />
addressed memory word onto the data bus. All devices must then move the contents of the data bus<br><br />
to the upper byte of DC0.<br />
|-<br />
|10010<br />
|12<br />
|L<br />
|All devices copy the contents of PC0 into PC1. All devices then move the contents of the data bus into<br><br />
the low order byte of PC0.<br />
|-<br />
|10011<br />
|13<br />
|L<br />
|The interrupting device with highest priority must move the high order half of the interrupt vector onto<br><br />
data bus. All devices must move the contents of the data bus into the high order byte of PC0. The<br><br />
interrupting device resets its interupt circuitry (so that it is no longer requesting CPU servicing and can <br><br />
respond to another interrupt).<br />
|-<br />
|-<br />
|10100<br />
|14<br />
|L<br />
|All devices move the contents of the data bus into the high low order byte of PC0.<br />
|-<br />
|10101<br />
|15<br />
|L<br />
|All devices move the contents of the data bus into the high order byte of PC1.<br />
|-<br />
|10110<br />
|16<br />
|L<br />
|All devices move the contents of the data bus into the high order byte of DC0.<br />
|-<br />
|10111<br />
|17<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of PC0.<br />
|-<br />
|11000<br />
|18<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of PC1.<br />
|-<br />
|11001<br />
|19<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of DC0.<br />
|-<br />
|11010<br />
|1A<br />
|L<br />
|During the prior cycle, an I/O port timer or interrupt control register was addressed; the device <br><br />
containing the addressed port must move the current contents of the data bus into the addressed port. <br />
|-<br />
|11011<br />
|1B<br />
|L<br />
|During the prior cycle, the data bus specified the address of an I/O port. The device containing the <br><br />
addressed I/O port must place the contents of the I/O port on the data bus. (Note that the contents of <br><br />
timer and interrupt control registers cannot be read back onto the data bus.)<br />
|-<br />
|11100<br />
|1C<br />
|L or S<br />
|None.<br />
|-<br />
|11101<br />
|1D<br />
|S<br />
|Devices with DC0 and DC1 registers must switch registers. Devices without a DC1 register perform no <br><br />
operation.<br />
|-<br />
|11110<br />
|1E<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the low order byte of PC0<br><br />
onto the data bus.<br />
|-<br />
|11111<br />
|1F<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the high order byte of PC0<br><br />
onto the data bus.<br />
|}</div>E5froghttp://channelf.se/veswiki/index.php?title=Opcode&diff=707Opcode2022-09-26T15:28:56Z<p>E5frog: /* The Instruction Set */</p>
<hr />
<div>The CPU of a digital computer responds to a series of ones and zeros read from memory. The pattern of these, that determine what the CPU is supposed to do, are called Operation Codes or '''opcode'''. As an example the opcode $2B on the F8 System means No Operation (NOP). Programs are made up of opcodes which instruct the F8 System to do something, such as load a register with a value, perform arithmetic on a register, change the program counter (jump) or input or output data through the [[port|ports]]. <br><br />
Opcodes in the F8 System are each one byte wide, though some may be followed by an address (two bytes) or a value for the opcode to use, these extra bytes are called operands and an opcode with its operand is called an instruction and the complete set for a CPU is called an Instruction Set. <br><br />
Instead of programming these numbers directly (Machine Code Programming) programmers came up with the '''mnemonic''' names and wrote programs to translate such code into machine code. This mnemonic form of programming is called Assembly Language. Below is a table showing both types, if you choose Assembly Language then [[DASM]] or [[f8tool]] are free Assemblers for the F8 System.<br />
<br />
== The Instruction Set ==<br />
<br />
In the information for each opcode, the following notations are used:<br />
{| border="1" cellspacing="1" cellpadding="4"<br />
! colspan="2" | Opcode Notations<br />
|-<br />
| '''A''' || [[Accumulator]]<br />
|- <br />
| '''Ri''' || [[First registers]] i (r0-r11 [HU,HL=r10,11])<br />
|- <br />
| '''P0''' || [[Program counter]] (PC0)<br />
|- <br />
| '''P''' || Program counter Stack (PC1)<br />
|- <br />
| '''DC0''' || [[Data counter]]<br />
|- <br />
| '''DC1''' || Data counter storage<br />
|- <br />
| '''W''' || [[Status register]] (x,x,x,ICB,O,Z,C,S) Exhange only via<br>the '''J''' register (R9)<br />
|- <br />
| '''ISAR''' || [[ISAR|Indirect Scratchpad Address Register]]<br />
|- <br />
| '''r''' || Scratchpad addressing as:<br />
{| border="1" cellspacing="1" cellpadding="4"<br />
<br />
| '''0 to 11''' || Select registers r0-r11<br />
|- <br />
| '''12''', '''S''' or '''IS''' || Reg. selected by ISAR <br> '''You can't call r12 (KU) using register number'''<br />
|- <br />
| '''13''', '''I''' or '''(IS)+''' || Reg. selected by ISAR, then ISAR = ISAR + 1 <br> '''You can't call r13 (KL) using register number''' <br />
|- <br />
| '''14''', '''D''' or '''(IS)-''' || Reg. selected by ISAR, then ISAR = ISAR - 1 <br> '''You can't call r14 (QU) using register number'''<br />
|}<br />
|- <br />
| '''t''' || 3-bit constant<br />
|- <br />
| '''i''' || 4-bit constant<br />
|- <br />
| '''n''' || 8-bit constant<br />
|- <br />
| '''mn''' || 16-bit constant<br />
|- <br />
| '''( &nbsp;)''' || Contents of register (e.g.(R11) or (DC))<br />
|- <br />
| '''x''' || Binary value placeholder<br />
|-<br />
! colspan="2" | Status Flag Notations<br />
|- <br />
| '''ICB''' || Interrupts Allowed Flag, b4 in W<br />
|- <br />
| '''O''' || Overflow Flag, b3 in W<br />
|- <br />
| '''Z''' || Zero Flag, b2 in W<br />
|- <br />
| '''C''' || Carry Flag, b1 in W<br />
|- <br />
| '''S''' || Sign Flag, b0 in W<br />
|- <br />
| '''0''' || Resets status flag<br />
|- <br />
| '''1''' || Sets status flag<br />
|- <br />
| '''X''' || Modifies status flag<br />
|}<br />
<br />
{| class="wikitable sortable" border="1" cellspacing="1" cellpadding="4" style="width: 100%" style="margin-right: auto<br />
|+ Table copied from [https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8_info]<br />Extra data added from [http://www.nyx.net/~lturner/public_html/F8_ins.html L. Turner F8 ins]<br>As well as the excellent [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf User's Guide (1976)]<br />
! rowspan="2" | Mnemonic<br />
! rowspan="2" | Length<br />
! rowspan="2" | Cycles<br />
! rowspan="2" | Description<br />
! colspan="2" | Opcode<br />
! colspan="4" class="unsortable" | Status Flags<br />
! rowspan="2" class="unsortable" | Cycle<br />
! rowspan="2" class="unsortable" | ROMC <br> state<br />
|-<br />
! Binary<br />
! Hex<br />
! style="width: 1.5em; cursor: help" title="Overflow" | O<br />
! style="width: 1.5em; cursor: help" title="Zero" | Z<br />
! style="width: 1.5em; cursor: help" title="Carry" | C<br />
! style="width: 1.5em; cursor: help" title="Signed" | S<br />
|- <br />
| LR A, KU || 1 || 1 || A &larr; (KU)[r12] || %00000000 || $00 ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR A, KL || 1 || 1 || A &larr; (KL)[r13] || %00000001 || $01 ||- ||- ||- ||- || S || 0<br />
|- = <br />
| LR A, QU || 1 || 1 || A &larr; (QU)[r14]|| %00000010 || $02 ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR A, QL || 1 || 1 || A &larr; (QL)[r15]|| %00000011 || $03 ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR KU, A || 1 || 1 || [r12]KU &larr; (A) || %00000100 || $04 ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR KL, A || 1 || 1 || [r13]KL &larr; (A) || %00000101 || $05 ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR QU, A || 1 || 1 || [r14]QU &larr; (A) || %00000110 || $06 ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR QL, A || 1 || 1 || [r15]QL &larr; (A) || %00000111 || $07 ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR K, P || 1 || 4 || [r12]KU &larr; (PC1U)<br>[r13]KL &larr; (PC1L) || %00001000 || $08 ||- ||- ||- ||- || L <br> L <br> S || 7 <br> B <br> 0<br />
|- <br />
| LR P, K || 1 || 4 || PC1U &larr; (KU)[r12] <br>PC1L &larr; (KL)[r13] || %00001001 || $09 ||- ||- ||- ||- || L <br> L <br> S || 15 <br> 18 <br> 0<br />
|- <br />
| LR A, IS || 1 || 1 || A &larr; (ISAR) || %00001010 || $0A ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR IS, A || 1 || 1 || ISAR &larr; (A) || %00001011 || $0B ||- ||- ||- ||- || S || 0<br />
|- <br />
| PK || 1 || 2.5 || PC1 &larr; (PC0)<br>PC0L &larr; (KL)[r13]<br>PC0U &larr; (KU)[r12] || %00001100 || $0C ||- ||- ||- ||- || L <br> L <br> S || 12 <br> 14 <br> 0<br />
|- <br />
| LR P0, Q || 1 || 4 || PC0L &larr; (QL)[r15]<br>PC0U &larr; (QU)[r14] || %00001101 || $0D ||- ||- ||- ||- || L <br> L <br> S || 17 <br> 14 <br> 0<br />
|- <br />
| LR Q, DC || 1 || 4 || [r14]QU &larr; (DC0U)<br>[r15]QL &larr; (DC0L) || %00001110 || $0E ||- ||- ||- ||- || L <br> L <br> S || 6 <br> 9 <br> 0<br />
|- <br />
| LR DC, Q || 1 || 4 || DC0U &larr; (QU)[r14]<br>DC0L &larr; (QL)[r15] || %00001111 || $0F ||- ||- ||- ||- || L <br> L <br> S || 16 <br> 19 <br> 0<br />
|- <br />
| LR DC, H || 1 || 4 || DC0U &larr; (R10)<br>DC0L &larr; (R11) || %00010000 || $10 ||- ||- ||- ||- || L <br> L <br> S || 16 <br> 19 <br> 0<br />
|- <br />
| LR H, DC || 1 || 4 || R10 &larr; (DC0U)<br>R11 &larr; (DC0L) || %00010001 || $11 ||- ||- ||- ||- || L <br> L <br> S || 6 <br> 9 <br> 0<br />
|- <br />
| SR 1 || 1 || 1 || Shift (A) right one bit, fill with %0 || %00010010 || $12 || 0 || X || 0 || 1 || S || 0<br />
|- <br />
| SL 1 || 1 || 1 || Shift (A) left one bit, fill with %0 || %00010011 || $13 || 0 || X || 0 || X || S || 0<br />
|- <br />
| SR 4 || 1 || 1 || Shift (A) right four bits, fill with %0000 || %00010100 || $14 || 0 || X || 0 || 1 || S || 0<br />
|- <br />
| SL 4 || 1 || 1 || Shift (A) left four bits, fill with %0000 || %00010101 || $15 || 0 || X || 0 || X || S || 0<br />
|- <br />
| LM || 1 || 2.5 || A &larr; ((DC0))<br>DC0 &larr; DC0 + 1 || %00010110 || $16 ||- ||- ||- ||- || L <br> S || 2 <br> 0<br />
|- <br />
| ST || 1 || 2.5 || DC0 &larr; (A)<br>DC0 &larr; DC0 + 1 || %00010111 || $17 ||- ||- ||- ||- || L <br> S || 5 <br> 0<br />
|-<br />
| COM || 1 || 1 || A &larr; (A)&oplus;$FF<br>[invert/complement]|| %00011000 || $18 || 0 || X || 0 || X || S || 0<br />
|- <br />
| LNK || 1 || 1 || A &larr; (A)+(C)<br>(add carry from previous operation)|| %00011001 || $19 ||X ||X ||X ||X || S || 0<br />
|- <br />
| DI || 1 || 1 || Disable interrupts<br>status register bit 4 || %00011010 || $1A ||- ||- ||- ||- || S <br> S || 1C <br> 0<br />
|- <br />
| EI || 1 || 1 || Enable interrupts<br>status register bit 4 || %00011011 || $1B ||- ||- ||- ||- || S <br> S || 1C <br> 0<br />
|- <br />
| POP || 1 || 2 || PC0 &larr; (PC1)|| %00011100 || $1C ||- ||- ||- ||- || S <br> S || 4 <br> 0<br />
|- <br />
| LR W, J || 1 || 1 || W &larr; (R9) || %00011101 || $1D ||- ||- ||- ||- || S <br> S || 1C <br> 0<br />
|- <br />
| LR J, W || 1 || 2 || R9 &larr; (W) || %00011110 || $1E ||- ||- ||- ||- || S || 0<br />
|-<br />
| INC || 1 || 1 || A &larr; (A)+1 || %00011111 || $1F ||X ||X ||X ||X || S || 0<br />
|- <br />
| LI n || 2 || 2.5 || A &larr; n || %00100000 %xxxxxxxx || $20 $xx ||- ||- ||- ||- || L <br> S || 3 <br> 0<br />
|- <br />
| NI n || 2 || 2.5 || A &larr; (A) AND n || %00100001 %xxxxxxxx || $21 $xx ||0 ||X ||0 ||X || L <br> S || 3 <br> 0<br />
|- <br />
| OI n || 2 || 2.5 || A &larr; (A) OR n || %00100010 %xxxxxxxx || $22 $xx ||0 ||X ||0 ||X || L <br> S || 3 <br> 0<br />
|- <br />
| XI n || 2 || 2.5 || A &larr; (A)&oplus;n || %00100011 %xxxxxxxx || $23 $xx ||0 ||X ||0 ||X || L <br> S || 3 <br> 0<br />
|- <br />
| AI n || 2 || 2.5 || A &larr; (A)+n || %00100100 %xxxxxxxx || $24 $xx || X || X || X || X || L <br> S || 3 <br> 0<br />
|- <br />
| CI n || 2 || 2.5 || n+!(A)+1 (n-A)<br>Only set status || %00100101 %xxxxxxxx || $25 $xx ||X ||X ||X ||X || L <br> S || 3 <br> 0<br />
|- <br />
| IN n || 2 || 4 || Data Bus &larr; Port n<br>A &larr; (Port n)|| %00100110 %xxxxxxxx || $26 $xx ||0 ||X ||0 ||X || L <br> L <br> S || 3 <br> 1B <br> 0<br />
|- <br />
| OUT n || 2 || 4 || Data Bus &larr; Port n<br>Port n &larr; (A)|| %00100111 %xxxxxxxx || $27 $xx ||- ||- ||- ||- || L <br> L <br> S || 3 <br> 1A <br> 0<br />
|-<br />
| PI mn|| 3 || 6.5 || A &larr; m<br>PC1 &larr; (PC0)+1<br>PC0L &larr; n<br>PC0U &larr; (A)<br>[A is destroyed] || %00101000 %xxxxxxxx %xxxxxxxx || $28 $xx $xx ||- ||- ||- ||- || L <br> S <br> L <br> L <br> S || 3 <br> D <br> C <br> 14 <br> 0<br />
|- <br />
| JMP mn || 3 || 5.5 || A &larr; m<br>PC0L &larr; n<br>PC0U &larr; (A)<br>[A is destroyed] || %00101001 %xxxxxxxx %xxxxxxxx || $29 $xx $xx ||- ||- ||- ||- || L <br> L <br> L <br> S || 3 <br> c <br> 14 <br> 0<br />
|- <br />
| DCI mn || 3 || 6 || DC0U &larr; m<br>PC0+1<br>DC0L &larr; n<br>PC0+1 || %00101010 %xxxxxxxx %xxxxxxxx || $2A $xx $xx ||- ||- ||- ||- || L <br> S <br> L <br> S <br> S || 11 <br> 3 <br> E <br> 3 <br> 0<br />
|- <br />
| NOP || 1 || 1 || No operation<br>(cycle waster) || %00101011 || $2B ||- ||- ||- ||- || S || 0<br />
|- <br />
| XDC || 1 || 2 || DC0,DC1 &larr; DC1,DC0 || %00101100 || $2C ||- ||- ||- ||- || S <br> S || 1D <br> 0<br />
|- <br />
| DS r || 1 || 1.5 || r &larr; (r)+$FF<br>[decrease scratchpad byte] || %0011xxxx || $3x ||X ||X ||X ||X || L || 0<br />
|- <br />
| LR A, r || 1 || 1 || A &larr; (r) || %0100xxxx || $4x || - || - || - || - || S || 0<br />
|- <br />
| LR A, HU || 1 || 1 || A &larr; (HU) || %01001010 || $4A ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR A, HL || 1 || 1 || A &larr; (HL) || %01001011 || $4B ||- ||- ||- ||- || S || 0<br />
|-<br />
| LR r, A || 1 || 1 || r &larr; (A) || %0101xxxx || $5x ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR HU, A || 1 || 1 || HU &larr; (A) || %01011010 || $5A ||- ||- ||- ||- || S || 0<br />
|- <br />
| LR HL, A || 1 || 1 || HL &larr; (A) || %01011011 || $5B ||- ||- ||- ||- || S || 0<br />
|-<br />
| LISU i || 1 || 1 || ISARU &larr; i || %01100xxx || $6x ||- ||- ||- ||- || S || 0<br />
|- <br />
| LISL i || 1 || 1 || ISARL &larr; i || %01101xxx || $6x ||- ||- ||- ||- || S || 0<br />
|- <br />
| CLR || 1 || 1 || A&larr;0 || %01110000 || $70 ||- ||- ||- ||- || S || 0<br />
|- <br />
| LIS i || 1 || 1 || A &larr; i || %0111xxxx || $7x ||- ||- ||- ||- || S || 0<br />
|- <br />
| BT t, n || 2 || 3 (no branch)<br>3.5 (branch) || AND [[bitmask]] t with W<br>if result is not 0:<br>PC0&larr;PC0+n+1<br>'''See table below''' || %10000xxx %xxxxxxxx || $8x ||- ||- ||- ||- || S <br> S <br> S <br> S <br> L <br> S || 1C <br> 3 <br> 0 <br> 1C <br> 1 <br> 0<br />
|- <br />
| BP n || 2 || 3 (no branch)<br>3.5 (branch) || if [[Positive|POSITIVE]]<br>(sign bit 0):<br>PC0&larr;PC0+n+1 || %10000001 %xxxxxxxx || $81 $xx ||- ||- ||- ||- || || <br />
|- <br />
| BC n || 2 || 3 (no branch)<br>3.5 (branch) || if CARRY:<br>PC0&larr;PC0+n+1 || %10000010 %xxxxxxxx || $82 $xx ||- ||- ||- ||- || || <br />
|- <br />
| BZ n || 2 || 3 (no branch)<br>3.5 (branch) || if ZERO:<br>PC0&larr;PC0+n+1 || %10000100 %xxxxxxxx || $84 $xx ||- ||- ||- ||- || || <br />
|-<br />
| AM || 1 || 2.5 || A &larr; (A)+((DC0))<br>DC0+1 || %10001000 || $88 ||X ||X ||X ||X || L <br> S || 2 <br> 0<br />
|-<br />
| AMD || 1 || 2.5 || A &larr; (A)+((DC0))<br>decimal adjusted<br>DC0+1 || %10001001 || $89 ||X ||X ||X ||X || L <br> S || 2 <br> 0<br />
|-<br />
| NM || 1 || 2.5 || A &larr; (A)AND((DC0))<br>DC0+1 || %10001010 || $8A ||0 ||X ||0 ||X || L <br> S || <br />
2 <br> 0<br />
|-<br />
| OM || 1 || 2.5 || A &larr; (A)OR((DC0))<br>DC0+1 || %10001011 || $8B ||0 ||X ||0 ||X || L <br> S || 2 <br> 0<br />
|-<br />
| XM || 1 || 2.5 || A &larr; (A)&oplus;((DC0))<br>DC0+1 || %10001100 || $8C ||0 ||X ||0 ||X || L <br> S || 2 <br> 0<br />
|-<br />
| CM || 1 || 2.5 || ((DC0))-A only set status<br>DC0+1|| %10001101 || $8D ||X ||X ||X ||X || L <br> S || 2 <br> 0<br />
|- <br />
| ADC || 1 || 2.5 || DC0 &larr; (DC0)+(A) || %10001110 || $8E ||- ||- ||- ||- || L <br> S || A <br> 0<br />
|- <br />
| BR7 n || 2 || 2 (no branch)<br>2.5 (branch) || if ISARL != 7: PC0 &larr; (PC0) + n +1 || %10001111 %xxxxxxxx || $8F $xx ||- ||- ||- ||- || S <br> S <br> L <br> S || 3 <br> 0 <br> 1 <br> 0<br />
|-<br />
| BR n || 2 || 3.5 || PC0 &larr; (PC0)+n+1 || %10010000 %xxxxxxxx || $90 $xx ||- ||- ||- ||- || || <br />
|- <br />
| BF i, n || 2 || 3 (no branch)<br>3.5 (branch) || AND [[bitmask]] i with W<br>if result = FALSE:<br>PC0 &larr; (PC0)+n+1<br>'''See table below''' || %1001xxxx %xxxxxxxx || $9x ||- ||- ||- ||- ||S <br> L <br> S <br> S <br> S <br> S|| 1C <br> 1 <br> 0 <br> 1C <br> 3 <br> 0<br />
|- <br />
| BM n || 2 || 3 (no branch)<br>3.5 (branch) || if [[Negative|NEGATIVE]]:<br>PC0 &larr; (PC0)+n+1 || %10010001 %xxxxxxxx || $91 $xx ||- ||- ||- ||- || || <br />
|- <br />
| BNC n || 2 || 3 (no branch)<br>3.5 (branch) || if NO CARRY:<br>PC0 &larr; (PC0)+n+1 || %10010010 %xxxxxxxx || $92 $xx ||- ||- ||- ||- || || <br />
|- <br />
| BNZ n || 2 || 3 (no branch)<br>3.5 (branch) || if NOT ZERO:<br>PC0 &larr; (PC0)+n+1 || %10010100 %xxxxxxxx || $94 $xx ||- ||- ||- ||- || || <br />
|- <br />
| BNO n || 2 || 3 (no branch)<br>3.5 (branch) || if NO OVERFLOW:<br>PC0 &larr; (PC0)+n+1 || %10011000 %xxxxxxxx || $98 $xx ||- ||- ||- ||- || || <br />
|- <br />
| INS i || 1 || 2 (i=0-1)<br>4 (i=2-15) || A &larr; (Port i)<br>if i=2-15: Data Bus &larr; Port Address<br>A &larr; (Port i) || %1010xxxx || $Ax ||0 ||X ||0 ||X || p0/1: S, S <br> p4-F: L, L, S || p0/1: 1C, 0 <br> p4-F: 1C, 1B, 0<br />
|- <br />
| OUTS i || 1 || 2 (i=0-1)<br>4 (i=2-15) || Port i &larr; (A)<br>if i=2-15: Data Bus &larr; Port Address<br>Port i &larr; (A) || %1011xxxx || $Bx ||- ||- ||- ||- || p0/1: S, S <br> p4-F: L, L, S || p0/1: 1C, 0 <br> p4-F: 1C, 1A, 0<br />
|- <br />
| AS r || 1 || 1 || A &larr; (A)+(r) || %1100xxxx || $Cx || X || X || X || X || S || 0<br />
|-<br />
| ASD r || 1 || 2 || A &larr; (A)+(r)<br>(decimal) || %1101xxxx || $Dx ||X ||X ||X ||X || S <br> S || 1C <br> 0<br />
|-<br />
| XS r || 1 || 1 || A &larr; (A)&oplus;(r) || %1110xxxx || $Ex ||0 ||X ||0 ||X || S || 0<br />
|-<br />
| NS r || 1 || 1 || A &larr; (A)AND(r) || %1111xxxx || $Fx ||0 ||X ||0 ||X || S || 0<br />
|-<br />
| || IRQ || 5.5 || PC0L &larr; Int address(l)<br>PC0U &larr; Int.Address(u)<br>PC1<-PC0 || || ||- ||- ||- ||- || L <br> L <br> L <br> S || 1C <br> 0F <br> 13 <br> 0<br />
|-<br />
| || RESET || 3.5 || PC0 &larr; 0<br>PC1 &larr; PC0 || || ||- ||- ||- ||- || S <br> L <br> S || 1C <br> 8 <br> 0<br />
|}<br />
<br />
<br />
=== The BT instruction ===<br />
<br />
{| class="wikitable" style="text-align: center<br />
!colspan="6"| Branch conditions for BT instruction<br />
|-<br />
|rowspan="2"|'''Operand''' <br>'''t'''<br />
|colspan="3"|'''Status flags tested'''<br />
|rowspan="2"|<br>'''Definition'''<br />
|rowspan="2"|<br>'''Comments'''<br />
|-<br />
|'''zero'''<br />
|'''carry'''<br />
|'''sign'''<br />
|-<br />
| 0 <br />
| 0 <br />
| 0 <br />
| 0 <br />
| Do not branch <br />
| An effective 3<br>cycle NO-OP<br />
|-<br />
| 1<br />
| 0<br />
| 0<br />
| 1<br />
| Branch if Positive<br />
| Same as '''BP'''<br />
|-<br />
| 2<br />
| 0<br />
| 1<br />
| 0<br />
| Branch on Carry<br />
| Same as '''BC'''<br />
|-<br />
| 3<br />
| 0<br />
| 1<br />
| 1<br />
| Branch if Carry<br>or on Positive<br />
| <br />
|-<br />
| 4<br />
| 1<br />
| 0<br />
| 0<br />
| Branch if Zero<br />
| Same as '''BZ'''<br />
|-<br />
| 5<br />
| 1<br />
| 0<br />
| 1<br />
| Branch if Zero<br>or Positive<br />
| Same as t=1<br />
|-<br />
| 6<br />
| 1<br />
| 1<br />
| 0<br />
| Branch if Zero or <br>on Carry<br />
| <br />
|-<br />
| 7<br />
| 1<br />
| 1<br />
| 1<br />
| Branch if Zero,<br>Carry or Positive<br />
| Same as t=3<br />
|}<br />
<br />
=== The BF instruction ===<br />
<br />
{| class="wikitable" style="text-align: center<br />
!colspan="7"| Branch conditions for BF instruction<br />
|-<br />
|rowspan="2"|'''Operand''' <br>'''t'''<br />
|colspan="4"|'''Status flags tested'''<br />
|rowspan="2"|<br>'''Definition'''<br />
|rowspan="2"|<br>'''Comments'''<br />
|-<br />
|&nbsp;'''ovf'''&nbsp;<br />
|'''zero&nbsp;'''<br />
|'''carry'''<br />
|'''sign&nbsp;'''<br />
|-<br />
| 0 <br />
| 0 <br />
| 0 <br />
| 0 <br />
| 0 <br />
| Unconditional branch<br>relative<br />
| <br />
|-<br />
| 1 <br />
| 0 <br />
| 0 <br />
| 0 <br />
| 1 <br />
| Branch on negative<br />
| Same as '''BM'''&nbsp;<br />
|-<br />
| 2 <br />
| 0 <br />
| 0 <br />
| 1 <br />
| 0 <br />
| Branch if no carry<br />
| Same as '''BNC'''<br />
|-<br />
| 3 <br />
| 0 <br />
| 0 <br />
| 1 <br />
| 1 <br />
| Branch if no carry<br> and negative<br />
| <br />
|-<br />
| 4 <br />
| 0 <br />
| 1 <br />
| 0 <br />
| 0 <br />
| Branch if not zero<br />
| Same as '''BNZ'''<br />
|-<br />
| 5 <br />
| 0 <br />
| 1 <br />
| 0 <br />
| 1 <br />
| <br />
| Same as t=1&nbsp;<br />
|-<br />
| 6 <br />
| 0 <br />
| 1 <br />
| 1 <br />
| 0 <br />
| Branch if no carry<br>and not zero<br />
| <br />
|-<br />
| 7 <br />
| 0 <br />
| 1 <br />
| 1 <br />
| 1 <br />
| <br />
| Same as t=3&nbsp;<br />
|-<br />
| 8 <br />
| 1 <br />
| 0 <br />
| 0 <br />
| 0 <br />
| Branch if there is no<br>overflow<br />
| Same as '''BNO'''<br />
|-<br />
| 9 <br />
| 1 <br />
| 0 <br />
| 0 <br />
| 1 <br />
| Branch if negative and<br>no overflow<br />
| <br />
|-<br />
| A <br />
| 1 <br />
| 0 <br />
| 1 <br />
| 0 <br />
| Branch if no overflow<br>and no carry<br />
| <br />
|-<br />
| B <br />
| 1 <br />
| 0 <br />
| 1 <br />
| 1 <br />
| Branch if no overflow,<br>no carry & negative<br />
| <br />
|-<br />
| C <br />
| 1 <br />
| 1 <br />
| 0 <br />
| 0 <br />
| Branch if no overflow<br>and not zero<br />
| <br />
|-<br />
| D <br />
| 1 <br />
| 1 <br />
| 0 <br />
| 1 <br />
| <br />
| Same as t=9&nbsp;<br />
|-<br />
| E <br />
| 1 <br />
| 1 <br />
| 1 <br />
| 0 <br />
| Branch if no overflow,<br>no carry & not zero<br />
| <br />
|-<br />
| F <br />
| 1 <br />
| 1 <br />
| 1 <br />
| 1 <br />
| <br />
| Same as t=B&nbsp;<br />
<br />
|}</div>E5froghttp://channelf.se/veswiki/index.php?title=ROMC&diff=706ROMC2022-09-26T14:03:37Z<p>E5frog: </p>
<hr />
<div>To save on capsule pins the different parts in the F8 processor system communicates with the ROMC-bus.<br><br />
Instead of an address bus each device has its own Program Counter (PC). <br><br />
<br />
A Short cycle is 4 clock periods long, a Long cycle is 6 clock periods long (sometimes referred to 1.5 cycles). <br><br />
<br />
== The different states ==<br />
<br />
{| class="wikitable" style="text-align: center;"<br />
! colspan="4" |ROMC Signal functions<br />
|- <br />
| '''ROMC'''<br>'''43210'''<br />
|<br>'''HEX'''<br />
|'''Cycle'''<br>'''length'''<br />
|<br>'''Function'''<br />
|-<br />
|00000<br />
|00<br />
|S,L<br />
|Instruction Fetch. The device whose address space includes the contents of the PC0 register must <br> <br />
place on the data bus the op code addressed by PC0; then all devices increment the contents of PC0.<br />
|- <br />
|00001<br />
|01<br />
|L<br />
|The device whose address space includes the contents of the PC0 register must place on the data bus <br><br />
the contents of the memory location addressed by PC0; then all devices add the 8-bit value on the data<br><br />
bus, as as signed binary number, to PC0.<br />
|- <br />
|00010<br />
|02<br />
|L<br />
|The device whose DC0 addresses a memory word within the address space of that device must <br><br />
place on the data bus the contents of the memory location addressed by DC0; then all devices <br><br />
increment DC0.<br />
|- <br />
|00011<br />
|03<br />
|L,S<br />
|Similar to 00, except that it is used for Immediate Operand fetches (using PC0) instead of <br><br />
instruction fetches. <br />
|-<br />
|00100<br />
|04<br />
|S<br />
|Copy the contents of PC1 into PC0. <br />
|-<br />
|00101<br />
|05<br />
|L<br />
|Store the data bus contents into the memory location pointed to by DC0; increment DC0.<br />
|-<br />
|00110<br />
|06<br />
|L<br />
|Place the high order byte of DC0 on the data bus.<br />
|-<br />
|00111<br />
|07<br />
|L<br />
|Place the high order byte of PC1 on the data bus. <br />
|-<br />
|01000<br />
|08<br />
|L<br />
|All devices copy the contents of PC0 into PC1. The CPU outputs zero on the data bus in this ROMC<br><br />
state. Load the data bus into both halves of PC0, thus clearing the register. <br />
|-<br />
|01001<br />
|09<br />
|L<br />
|The device whose address space includes the contents of the DC0 register must place the low order<br><br />
byte of DC0 onto the data bus. <br />
|-<br />
|01010<br />
|0A<br />
|L<br />
|All devices add the 8-bit value on the data bus, treated as a signed binary number, to the data counter.<br />
|-<br />
|01011<br />
|0B<br />
|L<br />
|The device whose address space includes the value in PC1 must place the low order byte of PC1 on<br><br />
the data bus.<br />
|-<br />
|01100<br />
|0C<br />
|L<br />
|The device whose address space includes the contents of the PC0 register must place the contents of<br><br />
the memory word addressed by PC0 onto the data bus; then all devices move the value that has just <br><br />
been placed on the data bus into the low order byte of PC0.<br />
|-<br />
|01101<br />
|0D<br />
|S<br />
|All devices store in PC1 the current contents of PC0, incremented by 1; PC0 is unaltered.<br />
|-<br />
|01110<br />
|0E<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the contents of the word <br><br />
adressed by PC0 onto the data bus. The value on the data bus is then moved tot the low order byte<br><br />
of DC0 by all devices<br />
|-<br />
|01111<br />
|0F<br />
|L<br />
|The interrupting device with highest priority must place the low order byte of the interrupt vector on the<br><br />
data bus. All devices must copy the contents of PC0 into PC1. All devices must move the contents of <br><br />
the data bus into the low order byte of PC0.<br />
|-<br />
|10000<br />
|10<br />
|L<br />
|Inhibit any modification to the interrupt priority logic.<br />
|-<br />
|10001<br />
|11<br />
|L<br />
|The device whose memory space includes the contents of PC0 must place the contents of the<br><br />
addressed memory word onto the data bus. All devices must then move the contents of the data bus<br><br />
to the upper byte of DC0.<br />
|-<br />
|10010<br />
|12<br />
|L<br />
|All devices copy the contents of PC0 into PC1. All devices then move the contents of the data bus into<br><br />
the low order byte of PC0.<br />
|-<br />
|10011<br />
|13<br />
|L<br />
|The interrupting device with highest priority must move the high order half of the interrupt vector onto<br><br />
data bus. All devices must move the contents of the data bus into the high order byte of PC0. The<br><br />
interrupting device resets its interupt circuitry (so that it is no longer requesting CPU servicing and can <br><br />
respond to another interrupt).<br />
|-<br />
|-<br />
|10100<br />
|14<br />
|L<br />
|All devices move the contents of the data bus into the high low order byte of PC0.<br />
|-<br />
|10101<br />
|15<br />
|L<br />
|All devices move the contents of the data bus into the high order byte of PC1.<br />
|-<br />
|10110<br />
|16<br />
|L<br />
|All devices move the contents of the data bus into the high order byte of DC0.<br />
|-<br />
|10111<br />
|17<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of PC0.<br />
|-<br />
|11000<br />
|18<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of PC1.<br />
|-<br />
|11001<br />
|19<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of DC0.<br />
|-<br />
|11010<br />
|1A<br />
|L<br />
|During the prior cycle, an I/O port timer or interrupt control register was addressed; the device <br><br />
containing the addressed port must move the current contents of the data bus into the addressed port. <br />
|-<br />
|11011<br />
|1B<br />
|L<br />
|During the prior cycle, the data bus specified the address of an I/O port. The device containing the <br><br />
addressed I/O port must place the contents of the I/O port on the data bus. (Note that the contents of <br><br />
timer and interrupt control registers cannot be read back onto the data bus.)<br />
|-<br />
|11100<br />
|1C<br />
|L or S<br />
|None.<br />
|-<br />
|11101<br />
|1D<br />
|S<br />
|Devices with DC0 and DC1 registers must switch registers. Devices without a DC1 register perform no <br><br />
operation.<br />
|-<br />
|11110<br />
|1E<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the low order byte of PC0<br><br />
onto the data bus.<br />
|-<br />
|11111<br />
|1F<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the high order byte of PC0<br><br />
onto the data bus.<br />
|}</div>E5froghttp://channelf.se/veswiki/index.php?title=ROMC&diff=705ROMC2022-09-26T14:03:10Z<p>E5frog: </p>
<hr />
<div>To save on capsule pins the different parts in the F8 processor system communicates with the ROMC-bus.<br><br />
Instead of an address bus each device has its own Program Counter (PC). <br><br />
<br />
A Short cycle is 4 clock periods long, a Long cycle is 6 clock periods long (sometimes referred to 1.5 cycles). <br><br />
The different states <br />
<br />
{| class="wikitable" style="text-align: center;"<br />
! colspan="4" |ROMC Signal functions<br />
|- <br />
| '''ROMC'''<br>'''43210'''<br />
|<br>'''HEX'''<br />
|'''Cycle'''<br>'''length'''<br />
|<br>'''Function'''<br />
|-<br />
|00000<br />
|00<br />
|S,L<br />
|Instruction Fetch. The device whose address space includes the contents of the PC0 register must <br> <br />
place on the data bus the op code addressed by PC0; then all devices increment the contents of PC0.<br />
|- <br />
|00001<br />
|01<br />
|L<br />
|The device whose address space includes the contents of the PC0 register must place on the data bus <br><br />
the contents of the memory location addressed by PC0; then all devices add the 8-bit value on the data<br><br />
bus, as as signed binary number, to PC0.<br />
|- <br />
|00010<br />
|02<br />
|L<br />
|The device whose DC0 addresses a memory word within the address space of that device must <br><br />
place on the data bus the contents of the memory location addressed by DC0; then all devices <br><br />
increment DC0.<br />
|- <br />
|00011<br />
|03<br />
|L,S<br />
|Similar to 00, except that it is used for Immediate Operand fetches (using PC0) instead of <br><br />
instruction fetches. <br />
|-<br />
|00100<br />
|04<br />
|S<br />
|Copy the contents of PC1 into PC0. <br />
|-<br />
|00101<br />
|05<br />
|L<br />
|Store the data bus contents into the memory location pointed to by DC0; increment DC0.<br />
|-<br />
|00110<br />
|06<br />
|L<br />
|Place the high order byte of DC0 on the data bus.<br />
|-<br />
|00111<br />
|07<br />
|L<br />
|Place the high order byte of PC1 on the data bus. <br />
|-<br />
|01000<br />
|08<br />
|L<br />
|All devices copy the contents of PC0 into PC1. The CPU outputs zero on the data bus in this ROMC<br><br />
state. Load the data bus into both halves of PC0, thus clearing the register. <br />
|-<br />
|01001<br />
|09<br />
|L<br />
|The device whose address space includes the contents of the DC0 register must place the low order<br><br />
byte of DC0 onto the data bus. <br />
|-<br />
|01010<br />
|0A<br />
|L<br />
|All devices add the 8-bit value on the data bus, treated as a signed binary number, to the data counter.<br />
|-<br />
|01011<br />
|0B<br />
|L<br />
|The device whose address space includes the value in PC1 must place the low order byte of PC1 on<br><br />
the data bus.<br />
|-<br />
|01100<br />
|0C<br />
|L<br />
|The device whose address space includes the contents of the PC0 register must place the contents of<br><br />
the memory word addressed by PC0 onto the data bus; then all devices move the value that has just <br><br />
been placed on the data bus into the low order byte of PC0.<br />
|-<br />
|01101<br />
|0D<br />
|S<br />
|All devices store in PC1 the current contents of PC0, incremented by 1; PC0 is unaltered.<br />
|-<br />
|01110<br />
|0E<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the contents of the word <br><br />
adressed by PC0 onto the data bus. The value on the data bus is then moved tot the low order byte<br><br />
of DC0 by all devices<br />
|-<br />
|01111<br />
|0F<br />
|L<br />
|The interrupting device with highest priority must place the low order byte of the interrupt vector on the<br><br />
data bus. All devices must copy the contents of PC0 into PC1. All devices must move the contents of <br><br />
the data bus into the low order byte of PC0.<br />
|-<br />
|10000<br />
|10<br />
|L<br />
|Inhibit any modification to the interrupt priority logic.<br />
|-<br />
|10001<br />
|11<br />
|L<br />
|The device whose memory space includes the contents of PC0 must place the contents of the<br><br />
addressed memory word onto the data bus. All devices must then move the contents of the data bus<br><br />
to the upper byte of DC0.<br />
|-<br />
|10010<br />
|12<br />
|L<br />
|All devices copy the contents of PC0 into PC1. All devices then move the contents of the data bus into<br><br />
the low order byte of PC0.<br />
|-<br />
|10011<br />
|13<br />
|L<br />
|The interrupting device with highest priority must move the high order half of the interrupt vector onto<br><br />
data bus. All devices must move the contents of the data bus into the high order byte of PC0. The<br><br />
interrupting device resets its interupt circuitry (so that it is no longer requesting CPU servicing and can <br><br />
respond to another interrupt).<br />
|-<br />
|-<br />
|10100<br />
|14<br />
|L<br />
|All devices move the contents of the data bus into the high low order byte of PC0.<br />
|-<br />
|10101<br />
|15<br />
|L<br />
|All devices move the contents of the data bus into the high order byte of PC1.<br />
|-<br />
|10110<br />
|16<br />
|L<br />
|All devices move the contents of the data bus into the high order byte of DC0.<br />
|-<br />
|10111<br />
|17<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of PC0.<br />
|-<br />
|11000<br />
|18<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of PC1.<br />
|-<br />
|11001<br />
|19<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of DC0.<br />
|-<br />
|11010<br />
|1A<br />
|L<br />
|During the prior cycle, an I/O port timer or interrupt control register was addressed; the device <br><br />
containing the addressed port must move the current contents of the data bus into the addressed port. <br />
|-<br />
|11011<br />
|1B<br />
|L<br />
|During the prior cycle, the data bus specified the address of an I/O port. The device containing the <br><br />
addressed I/O port must place the contents of the I/O port on the data bus. (Note that the contents of <br><br />
timer and interrupt control registers cannot be read back onto the data bus.)<br />
|-<br />
|11100<br />
|1C<br />
|L or S<br />
|None.<br />
|-<br />
|11101<br />
|1D<br />
|S<br />
|Devices with DC0 and DC1 registers must switch registers. Devices without a DC1 register perform no <br><br />
operation.<br />
|-<br />
|11110<br />
|1E<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the low order byte of PC0<br><br />
onto the data bus.<br />
|-<br />
|11111<br />
|1F<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the high order byte of PC0<br><br />
onto the data bus.<br />
|}</div>E5froghttp://channelf.se/veswiki/index.php?title=ROMC&diff=704ROMC2022-09-26T14:02:44Z<p>E5frog: </p>
<hr />
<div>To save on capsule pins the different parts in the F8 processor system communicates with the ROMC-bus.<br><br />
Instead of an address bus each device has its own Program Counter (PC). <br><br />
<br />
A Short cycle is 4 clock periods long, a Long cycle is 6 clock periods long (sometimes referred to 1.5 cycles). <br />
The different states <br />
<br />
{| class="wikitable" style="text-align: center;"<br />
! colspan="4" |ROMC Signal functions<br />
|- <br />
| '''ROMC'''<br>'''43210'''<br />
|<br>'''HEX'''<br />
|'''Cycle'''<br>'''length'''<br />
|<br>'''Function'''<br />
|-<br />
|00000<br />
|00<br />
|S,L<br />
|Instruction Fetch. The device whose address space includes the contents of the PC0 register must <br> <br />
place on the data bus the op code addressed by PC0; then all devices increment the contents of PC0.<br />
|- <br />
|00001<br />
|01<br />
|L<br />
|The device whose address space includes the contents of the PC0 register must place on the data bus <br><br />
the contents of the memory location addressed by PC0; then all devices add the 8-bit value on the data<br><br />
bus, as as signed binary number, to PC0.<br />
|- <br />
|00010<br />
|02<br />
|L<br />
|The device whose DC0 addresses a memory word within the address space of that device must <br><br />
place on the data bus the contents of the memory location addressed by DC0; then all devices <br><br />
increment DC0.<br />
|- <br />
|00011<br />
|03<br />
|L,S<br />
|Similar to 00, except that it is used for Immediate Operand fetches (using PC0) instead of <br><br />
instruction fetches. <br />
|-<br />
|00100<br />
|04<br />
|S<br />
|Copy the contents of PC1 into PC0. <br />
|-<br />
|00101<br />
|05<br />
|L<br />
|Store the data bus contents into the memory location pointed to by DC0; increment DC0.<br />
|-<br />
|00110<br />
|06<br />
|L<br />
|Place the high order byte of DC0 on the data bus.<br />
|-<br />
|00111<br />
|07<br />
|L<br />
|Place the high order byte of PC1 on the data bus. <br />
|-<br />
|01000<br />
|08<br />
|L<br />
|All devices copy the contents of PC0 into PC1. The CPU outputs zero on the data bus in this ROMC<br><br />
state. Load the data bus into both halves of PC0, thus clearing the register. <br />
|-<br />
|01001<br />
|09<br />
|L<br />
|The device whose address space includes the contents of the DC0 register must place the low order<br><br />
byte of DC0 onto the data bus. <br />
|-<br />
|01010<br />
|0A<br />
|L<br />
|All devices add the 8-bit value on the data bus, treated as a signed binary number, to the data counter.<br />
|-<br />
|01011<br />
|0B<br />
|L<br />
|The device whose address space includes the value in PC1 must place the low order byte of PC1 on<br><br />
the data bus.<br />
|-<br />
|01100<br />
|0C<br />
|L<br />
|The device whose address space includes the contents of the PC0 register must place the contents of<br><br />
the memory word addressed by PC0 onto the data bus; then all devices move the value that has just <br><br />
been placed on the data bus into the low order byte of PC0.<br />
|-<br />
|01101<br />
|0D<br />
|S<br />
|All devices store in PC1 the current contents of PC0, incremented by 1; PC0 is unaltered.<br />
|-<br />
|01110<br />
|0E<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the contents of the word <br><br />
adressed by PC0 onto the data bus. The value on the data bus is then moved tot the low order byte<br><br />
of DC0 by all devices<br />
|-<br />
|01111<br />
|0F<br />
|L<br />
|The interrupting device with highest priority must place the low order byte of the interrupt vector on the<br><br />
data bus. All devices must copy the contents of PC0 into PC1. All devices must move the contents of <br><br />
the data bus into the low order byte of PC0.<br />
|-<br />
|10000<br />
|10<br />
|L<br />
|Inhibit any modification to the interrupt priority logic.<br />
|-<br />
|10001<br />
|11<br />
|L<br />
|The device whose memory space includes the contents of PC0 must place the contents of the<br><br />
addressed memory word onto the data bus. All devices must then move the contents of the data bus<br><br />
to the upper byte of DC0.<br />
|-<br />
|10010<br />
|12<br />
|L<br />
|All devices copy the contents of PC0 into PC1. All devices then move the contents of the data bus into<br><br />
the low order byte of PC0.<br />
|-<br />
|10011<br />
|13<br />
|L<br />
|The interrupting device with highest priority must move the high order half of the interrupt vector onto<br><br />
data bus. All devices must move the contents of the data bus into the high order byte of PC0. The<br><br />
interrupting device resets its interupt circuitry (so that it is no longer requesting CPU servicing and can <br><br />
respond to another interrupt).<br />
|-<br />
|-<br />
|10100<br />
|14<br />
|L<br />
|All devices move the contents of the data bus into the high low order byte of PC0.<br />
|-<br />
|10101<br />
|15<br />
|L<br />
|All devices move the contents of the data bus into the high order byte of PC1.<br />
|-<br />
|10110<br />
|16<br />
|L<br />
|All devices move the contents of the data bus into the high order byte of DC0.<br />
|-<br />
|10111<br />
|17<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of PC0.<br />
|-<br />
|11000<br />
|18<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of PC1.<br />
|-<br />
|11001<br />
|19<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of DC0.<br />
|-<br />
|11010<br />
|1A<br />
|L<br />
|During the prior cycle, an I/O port timer or interrupt control register was addressed; the device <br><br />
containing the addressed port must move the current contents of the data bus into the addressed port. <br />
|-<br />
|11011<br />
|1B<br />
|L<br />
|During the prior cycle, the data bus specified the address of an I/O port. The device containing the <br><br />
addressed I/O port must place the contents of the I/O port on the data bus. (Note that the contents of <br><br />
timer and interrupt control registers cannot be read back onto the data bus.)<br />
|-<br />
|11100<br />
|1C<br />
|L or S<br />
|None.<br />
|-<br />
|11101<br />
|1D<br />
|S<br />
|Devices with DC0 and DC1 registers must switch registers. Devices without a DC1 register perform no <br><br />
operation.<br />
|-<br />
|11110<br />
|1E<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the low order byte of PC0<br><br />
onto the data bus.<br />
|-<br />
|11111<br />
|1F<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the high order byte of PC0<br><br />
onto the data bus.<br />
|}</div>E5froghttp://channelf.se/veswiki/index.php?title=ROMC&diff=703ROMC2022-09-26T13:49:01Z<p>E5frog: </p>
<hr />
<div>To save on capsule pins the different parts in the F8 processor system communicates with the ROMC-bus.<br><br />
Instead of an address bus each device has its own Program Counter (PC). <br />
The different states <br />
<br />
{| class="wikitable" style="text-align: center;"<br />
! colspan="4" |ROMC Signal functions<br />
|- <br />
| '''ROMC'''<br>'''43210'''<br />
|<br>'''HEX'''<br />
|'''Cycle'''<br>'''length'''<br />
|<br>'''Function'''<br />
|-<br />
|00000<br />
|00<br />
|S,L<br />
|Instruction Fetch. The device whose address space includes the contents of the PC0 register must <br> <br />
place on the data bus the op code addressed by PC0; then all devices increment the contents of PC0.<br />
|- <br />
|00001<br />
|01<br />
|L<br />
|The device whose address space includes the contents of the PC0 register must place on the data bus <br><br />
the contents of the memory location addressed by PC0; then all devices add the 8-bit value on the data<br><br />
bus, as as signed binary number, to PC0.<br />
|- <br />
|00010<br />
|02<br />
|L<br />
|The device whose DC0 addresses a memory word within the address space of that device must <br><br />
place on the data bus the contents of the memory location addressed by DC0; then all devices <br><br />
increment DC0.<br />
|- <br />
|00011<br />
|03<br />
|L,S<br />
|Similar to 00, except that it is used for Immediate Operand fetches (using PC0) instead of <br><br />
instruction fetches. <br />
|-<br />
|00100<br />
|04<br />
|S<br />
|Copy the contents of PC1 into PC0. <br />
|-<br />
|00101<br />
|05<br />
|L<br />
|Store the data bus contents into the memory location pointed to by DC0; increment DC0.<br />
|-<br />
|00110<br />
|06<br />
|L<br />
|Place the high order byte of DC0 on the data bus.<br />
|-<br />
|00111<br />
|07<br />
|L<br />
|Place the high order byte of PC1 on the data bus. <br />
|-<br />
|01000<br />
|08<br />
|L<br />
|All devices copy the contents of PC0 into PC1. The CPU outputs zero on the data bus in this ROMC<br><br />
state. Load the data bus into both halves of PC0, thus clearing the register. <br />
|-<br />
|01001<br />
|09<br />
|L<br />
|The device whose address space includes the contents of the DC0 register must place the low order<br><br />
byte of DC0 onto the data bus. <br />
|-<br />
|01010<br />
|0A<br />
|L<br />
|All devices add the 8-bit value on the data bus, treated as a signed binary number, to the data counter.<br />
|-<br />
|01011<br />
|0B<br />
|L<br />
|The device whose address space includes the value in PC1 must place the low order byte of PC1 on<br><br />
the data bus.<br />
|-<br />
|01100<br />
|0C<br />
|L<br />
|The device whose address space includes the contents of the PC0 register must place the contents of<br><br />
the memory word addressed by PC0 onto the data bus; then all devices move the value that has just <br><br />
been placed on the data bus into the low order byte of PC0.<br />
|-<br />
|01101<br />
|0D<br />
|S<br />
|All devices store in PC1 the current contents of PC0, incremented by 1; PC0 is unaltered.<br />
|-<br />
|01110<br />
|0E<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the contents of the word <br><br />
adressed by PC0 onto the data bus. The value on the data bus is then moved tot the low order byte<br><br />
of DC0 by all devices<br />
|-<br />
|01111<br />
|0F<br />
|L<br />
|The interrupting device with highest priority must place the low order byte of the interrupt vector on the<br><br />
data bus. All devices must copy the contents of PC0 into PC1. All devices must move the contents of <br><br />
the data bus into the low order byte of PC0.<br />
|-<br />
|10000<br />
|10<br />
|L<br />
|Inhibit any modification to the interrupt priority logic.<br />
|-<br />
|10001<br />
|11<br />
|L<br />
|The device whose memory space includes the contents of PC0 must place the contents of the<br><br />
addressed memory word onto the data bus. All devices must then move the contents of the data bus<br><br />
to the upper byte of DC0.<br />
|-<br />
|10010<br />
|12<br />
|L<br />
|All devices copy the contents of PC0 into PC1. All devices then move the contents of the data bus into<br><br />
the low order byte of PC0.<br />
|-<br />
|10011<br />
|13<br />
|L<br />
|The interrupting device with highest priority must move the high order half of the interrupt vector onto<br><br />
data bus. All devices must move the contents of the data bus into the high order byte of PC0. The<br><br />
interrupting device resets its interupt circuitry (so that it is no longer requesting CPU servicing and can <br><br />
respond to another interrupt).<br />
|-<br />
|-<br />
|10100<br />
|14<br />
|L<br />
|All devices move the contents of the data bus into the high low order byte of PC0.<br />
|-<br />
|10101<br />
|15<br />
|L<br />
|All devices move the contents of the data bus into the high order byte of PC1.<br />
|-<br />
|10110<br />
|16<br />
|L<br />
|All devices move the contents of the data bus into the high order byte of DC0.<br />
|-<br />
|10111<br />
|17<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of PC0.<br />
|-<br />
|11000<br />
|18<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of PC1.<br />
|-<br />
|11001<br />
|19<br />
|L<br />
|All devices move the contents of the data bus into the low order byte of DC0.<br />
|-<br />
|11010<br />
|1A<br />
|L<br />
|During the prior cycle, an I/O port timer or interrupt control register was addressed; the device <br><br />
containing the addressed port must move the current contents of the data bus into the addressed port. <br />
|-<br />
|11011<br />
|1B<br />
|L<br />
|During the prior cycle, the data bus specified the address of an I/O port. The device containing the <br><br />
addressed I/O port must place the contents of the I/O port on the data bus. (Note that the contents of <br><br />
timer and interrupt control registers cannot be read back onto the data bus.)<br />
|-<br />
|11100<br />
|1C<br />
|L or S<br />
|None.<br />
|-<br />
|11101<br />
|1D<br />
|S<br />
|Devices with DC0 and DC1 registers must switch registers. Devices without a DC1 register perform no <br><br />
operation.<br />
|-<br />
|11110<br />
|1E<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the low order byte of PC0<br><br />
onto the data bus.<br />
|-<br />
|11111<br />
|1F<br />
|L<br />
|The device whose address space includes the contents of PC0 must place the high order byte of PC0<br><br />
onto the data bus.<br />
|}</div>E5froghttp://channelf.se/veswiki/index.php?title=Pinouts&diff=702Pinouts2022-09-26T12:01:10Z<p>E5frog: /* Power pinout */</p>
<hr />
<div>== System Fairchild cartridge pinout ==<br />
<br />
{| class="wikitable" style="text-align: center;"<br />
! colspan="2" |[[Image:Cartridge pinout.png]]<br />
|- <br />
|1 GND<br />
|12 ROMC4<br />
|-<br />
|2 GND<br />
|13 PHI<br />
|-<br />
|3 D0<br />
|14 D4<br />
|-<br />
|4 D1<br />
|15 WRITE<br />
|-<br />
|5 /INTREQ<br />
|16 D5<br />
|-<br />
|6 ROMC0<br />
|17 D6<br />
|-<br />
|7 ROMC1<br />
|18 D7<br />
|-<br />
|8 ROMC2<br />
|19 +5V<br />
|-<br />
|9 D2<br />
|20 +5V<br />
|-<br />
|10 ROMC3<br />
|21 Not Connected<br />
|-<br />
|11 D3<br />
|22 +12V<br />
|}<br />
<br />
Dx signals are eight bits of data.<br><br />
PHI is the clock signal.<br><br />
/INTREQ is (hardly ever) used for interrupt.<br><br />
WRITE is the signal for writing data.<br><br />
ROMCx are control signals that all 38xx chips use to control what to put on the bus etc.<br><br />
You can read more about the 32 ROMC-states here on page 20: [https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] or the [[ROMC|ROMC table]].<br><br />
Usually the cartridges have two 3851 [https://channelf.se/veswiki/index.php?title=F8#3851_PSU PSU:s], later carts may have RAM and/or up to three PSU:s <br><br />
and the last released carts seem to use a [https://channelf.se/veswiki/index.php?title=F8#3853_SMI 3853 SMI] chip in combination with a plain ROM chip, <br> <br />
there are other possibilities though.<br />
<br />
== Controller connector pinout ==<br />
<br />
On the Fairchild VES/Channel F, Luxor VES, SABA etc with a fixed controller the pinout of a hand controller is this: <br />
(in the order of the internal 18 pole connector)<br />
<pre><br />
1: black: push down<br />
3: brown: pull up <br />
5: red: clockwise <br />
7: orange: counter-clockwise<br />
9: yellow: forward<br />
11: green: backwards<br />
13: blue: left<br />
15: grey: right<br />
18: white: ground<br />
<br />
Skipped numbers are empty in the connector, 16 is plugged. <br />
Colors vs function are very helpful when resoldering wire in the hand controller.<br />
</pre><br />
<br />
<pre><br />
Channel F II, Grandstand, Nordmende, Luxor 9 pin D-SUB female connector<br />
(called DE9F). Pinout watching the holes on the controller connector:<br />
<br />
5 4 3 2 1<br />
9 8 7 6 <br />
<br />
1: counter-clockwise<br />
2: clockwise<br />
3: pull up<br />
4: push down<br />
5: right<br />
6: forward<br />
7: back<br />
8: left<br />
9: ground<br />
</pre><br />
<br />
== Power pinout ==<br />
<br />
<pre><br />
Luxor Video Entertainment System <br />
<br />
9 VAC between pin 1 and 2 on the 4 pin DIN connector<br />
15 VAC between pin 3 and 4 on the DIN connector<br />
Transformer uses a 80mA slow blow (T) fuse.<br />
<br />
</pre><br />
<br />
== Special Chips ==<br />
<br />
<br />
Pinout for the FCM9102 audio/buffer chip (Rolo, AtariAge)<br />
[[File:FCM9102.jpg|200px|thumb|left|alt text]]</div>E5froghttp://channelf.se/veswiki/index.php?title=Pinouts&diff=701Pinouts2022-09-26T12:00:10Z<p>E5frog: </p>
<hr />
<div>== System Fairchild cartridge pinout ==<br />
<br />
{| class="wikitable" style="text-align: center;"<br />
! colspan="2" |[[Image:Cartridge pinout.png]]<br />
|- <br />
|1 GND<br />
|12 ROMC4<br />
|-<br />
|2 GND<br />
|13 PHI<br />
|-<br />
|3 D0<br />
|14 D4<br />
|-<br />
|4 D1<br />
|15 WRITE<br />
|-<br />
|5 /INTREQ<br />
|16 D5<br />
|-<br />
|6 ROMC0<br />
|17 D6<br />
|-<br />
|7 ROMC1<br />
|18 D7<br />
|-<br />
|8 ROMC2<br />
|19 +5V<br />
|-<br />
|9 D2<br />
|20 +5V<br />
|-<br />
|10 ROMC3<br />
|21 Not Connected<br />
|-<br />
|11 D3<br />
|22 +12V<br />
|}<br />
<br />
Dx signals are eight bits of data.<br><br />
PHI is the clock signal.<br><br />
/INTREQ is (hardly ever) used for interrupt.<br><br />
WRITE is the signal for writing data.<br><br />
ROMCx are control signals that all 38xx chips use to control what to put on the bus etc.<br><br />
You can read more about the 32 ROMC-states here on page 20: [https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] or the [[ROMC|ROMC table]].<br><br />
Usually the cartridges have two 3851 [https://channelf.se/veswiki/index.php?title=F8#3851_PSU PSU:s], later carts may have RAM and/or up to three PSU:s <br><br />
and the last released carts seem to use a [https://channelf.se/veswiki/index.php?title=F8#3853_SMI 3853 SMI] chip in combination with a plain ROM chip, <br> <br />
there are other possibilities though.<br />
<br />
== Controller connector pinout ==<br />
<br />
On the Fairchild VES/Channel F, Luxor VES, SABA etc with a fixed controller the pinout of a hand controller is this: <br />
(in the order of the internal 18 pole connector)<br />
<pre><br />
1: black: push down<br />
3: brown: pull up <br />
5: red: clockwise <br />
7: orange: counter-clockwise<br />
9: yellow: forward<br />
11: green: backwards<br />
13: blue: left<br />
15: grey: right<br />
18: white: ground<br />
<br />
Skipped numbers are empty in the connector, 16 is plugged. <br />
Colors vs function are very helpful when resoldering wire in the hand controller.<br />
</pre><br />
<br />
<pre><br />
Channel F II, Grandstand, Nordmende, Luxor 9 pin D-SUB female connector<br />
(called DE9F). Pinout watching the holes on the controller connector:<br />
<br />
5 4 3 2 1<br />
9 8 7 6 <br />
<br />
1: counter-clockwise<br />
2: clockwise<br />
3: pull up<br />
4: push down<br />
5: right<br />
6: forward<br />
7: back<br />
8: left<br />
9: ground<br />
</pre><br />
<br />
== Power pinout ==<br />
<br />
<pre><br />
Luxor Video Entertainment System <br />
<br />
9 VAC between pin 1 and 2 on the 4 pin DIN connector<br />
15 VAC between pin 3 and 4 on the DIN connector<br />
Transformer uses a 80mA slow blow (T) fuse.<br />
<br />
</pre><br />
<br />
Pinout for the FCM9102 audio/buffer chip (Rolo, AtariAge)<br />
[[File:FCM9102.jpg|200px|thumb|left|alt text]]</div>E5froghttp://channelf.se/veswiki/index.php?title=File:FCM9102.jpg&diff=700File:FCM9102.jpg2022-09-26T11:56:41Z<p>E5frog: </p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=Homebrew:F8_of_Nations&diff=699Homebrew:F8 of Nations2022-09-24T16:10:34Z<p>E5frog: </p>
<hr />
<div><div id="col1" style="width:437px; float: right"><br />
<div style="border: 1px solid #437; padding: 5px; margin: 5px 0; background: #FFE;"><br />
{{#ev:youtube|JVeXk8X7PFg|425}}<br />
''F8 of Nations, color version.''<br />
</div><br />
</div><br />
<br />
Smallest Fairchild Channel F game ever with only 32 Bytes on the black and white version with no score. Uses almost only BIOS routines.<br />
<br />
Unfortunately the original description has been lost but it was something about saving the Earth by pressing the sequence showed as soon as possible.<br />
<br />
Hold the corresponding button when digit is shown, keep holding until it changes.<br />
<br />
The only game to date that uses the console buttons instead of a hand controller.<br />
<br />
<br />
Get the padded versions here: <br><br />
*[[:File:F8ofNations_b-w.bin|Download]] black and white version.<br />
*[[:File:F8ofNations_color&score.bin|Download]] color and score version.<br />
<pre><br />
; F8 of Nations<br />
;<br />
; written by nycurt<br />
<br />
processor f8<br />
<br />
;------------;<br />
; BIOS Calls ;<br />
;------------;<br />
<br />
prompt = $0099<br />
clrscrn = $00D0<br />
IncP1Score = $02AC<br />
<br />
;===================;<br />
; Main Program Code ;<br />
;===================;<br />
<br />
;---------------;<br />
; Program Entry ;<br />
;---------------;<br />
<br />
org $800<br />
<br />
<br />
LR $5,A ; $55 Needs to be at beginning of cartridge<br />
LR $A,A ; Can be anything in this byte. In early versions this was used as code<br />
<br />
<br />
IF 0<br />
If you add the following code to the beginning of the game, the gameplay will be in color and it <br />
will keep track of your score (which wraps around when you get to 99).<br />
<br />
ENDIF<br />
<br />
IF 0<br />
li $99<br />
LISU 2 ; 02b0 6e<br />
LISL 6 ; 02b0 6e<br />
lr I,A<br />
<br />
li $d6<br />
lisu 3<br />
lr S,A<br />
lr 3, A<br />
pi clrscrn<br />
nextround:<br />
LISU 2 ; 02b0 6e<br />
pi IncP1Score<br />
<br />
ENDIF<br />
<br />
nextround:<br />
li $45 ; Bit 6 in this byte is used to emit a sound when written to port 5<br />
outs 5 ; Play a sound<br />
<br />
<br />
<br />
<br />
<br />
; Store $45 in reg0 - $4 specifies blue and $5 the '5' character to the prompt func. This <br />
; register will be decremented 1 to 4 times to select a number from '1' to '4'<br />
lr $0,A <br />
<br />
; And the byte referenced by the DC with $3 - this gives a number from 1 to 4 for the game<br />
lis $3<br />
; The DC is used in addressing memory. The H register will have been initialized to 0 by the BIOS<br />
; before we are started, so we point the DC at 0. Each successive round will advance the DC by<br />
; one byte. The number that is selected (1-4) is determined by the low-order three bits in the<br />
; byte loaded from the DC. If the user plays for a very long time the DC will increment beyond<br />
; valid memory.<br />
lr DC,H<br />
nm ; and #$3 with the memory referenced by the DC<br />
lr H,DC<br />
<br />
; Loop control variable initialized with the # that the user must match<br />
; The value $10 will be shifted right each time through the loop and will match the correct <br />
; input value for the button that corresponds to the number.<br />
lr $9,A<br />
li $10<br />
loop:<br />
sr 1<br />
ds $0 ; Decrement the value that will be sent to prompt (initialized to $45)<br />
ds $9<br />
bc loop<br />
lr $9,A ; This has the bit corresponding to the correct button the user must press<br />
<br />
pi prompt <br />
; This displays the number (with '?'), and waits for input and delays briefly<br />
; There is no need to write $0 to port 0 to prepare it for input... the prompt<br />
; subroutine will have done so for us... see instructions at $764 in BIOS<br />
ins 0 ; Retrieve console button state<br />
com ; Complement it ($1=but1,$2=but2,$4=but3,$8=but4)<br />
ni $F ; Clip off the top four bits<br />
outs 5 <br />
; Clear the sound register... We know the relevant top two bits of A are clear<br />
xs $9 ; XOR with Reg 9 which contains the correct input<br />
delayforever:<br />
bnz delayforever ; User lost the game. Freeze<br />
<br />
br nextround ; The user entered the correct response. Torture them some more<br />
<br />
<br />
org $fff ; added only to set a useable rom-size in MESS<br />
.byte $ff<br />
<br />
</pre></div>E5froghttp://channelf.se/veswiki/index.php?title=Homebrew:F8_of_Nations&diff=698Homebrew:F8 of Nations2022-09-24T16:06:44Z<p>E5frog: </p>
<hr />
<div><div id="col1" style="width:437px; float: right"><br />
<div style="border: 1px solid #437; padding: 5px; margin: 5px 0; background: #FFE;"><br />
{{#ev:youtube|JVeXk8X7PFg|425}}<br />
''F8 of Nations, color version.''<br />
</div><br />
</div><br />
<br />
Smallest Fairchild Channel F game ever with only 37 Bytes on the black and white version with no score. Uses almost only BIOS routines.<br />
<br />
Unfortunately the original description has been lost but it was something about saving the Earth by pressing the sequence showed as soon as possible.<br />
<br />
Hold the corresponding button when digit is shown, keep holding until it changes.<br />
<br />
The only game to date that uses the console buttons instead of a hand controller.<br />
<br />
<br />
Get the padded versions here: <br><br />
*[[:File:F8ofNations_b-w.bin|Download]] black and white version.<br />
*[[:File:F8ofNations_color&score.bin|Download]] color and score version.<br />
<pre><br />
; F8 of Nations<br />
;<br />
; written by nycurt<br />
<br />
processor f8<br />
<br />
;------------;<br />
; BIOS Calls ;<br />
;------------;<br />
<br />
prompt = $0099<br />
clrscrn = $00D0<br />
IncP1Score = $02AC<br />
<br />
;===================;<br />
; Main Program Code ;<br />
;===================;<br />
<br />
;---------------;<br />
; Program Entry ;<br />
;---------------;<br />
<br />
org $800<br />
<br />
<br />
LR $5,A ; $55 Needs to be at beginning of cartridge<br />
LR $A,A ; Can be anything in this byte. In early versions this was used as code<br />
<br />
<br />
IF 0<br />
If you add the following code to the beginning of the game, the gameplay will be in color and it <br />
will keep track of your score (which wraps around when you get to 99).<br />
<br />
ENDIF<br />
<br />
IF 0<br />
li $99<br />
LISU 2 ; 02b0 6e<br />
LISL 6 ; 02b0 6e<br />
lr I,A<br />
<br />
li $d6<br />
lisu 3<br />
lr S,A<br />
lr 3, A<br />
pi clrscrn<br />
nextround:<br />
LISU 2 ; 02b0 6e<br />
pi IncP1Score<br />
<br />
ENDIF<br />
<br />
nextround:<br />
li $45 ; Bit 6 in this byte is used to emit a sound when written to port 5<br />
outs 5 ; Play a sound<br />
<br />
<br />
<br />
<br />
<br />
; Store $45 in reg0 - $4 specifies blue and $5 the '5' character to the prompt func. This <br />
; register will be decremented 1 to 4 times to select a number from '1' to '4'<br />
lr $0,A <br />
<br />
; And the byte referenced by the DC with $3 - this gives a number from 1 to 4 for the game<br />
lis $3<br />
; The DC is used in addressing memory. The H register will have been initialized to 0 by the BIOS<br />
; before we are started, so we point the DC at 0. Each successive round will advance the DC by<br />
; one byte. The number that is selected (1-4) is determined by the low-order three bits in the<br />
; byte loaded from the DC. If the user plays for a very long time the DC will increment beyond<br />
; valid memory.<br />
lr DC,H<br />
nm ; and #$3 with the memory referenced by the DC<br />
lr H,DC<br />
<br />
; Loop control variable initialized with the # that the user must match<br />
; The value $10 will be shifted right each time through the loop and will match the correct <br />
; input value for the button that corresponds to the number.<br />
lr $9,A<br />
li $10<br />
loop:<br />
sr 1<br />
ds $0 ; Decrement the value that will be sent to prompt (initialized to $45)<br />
ds $9<br />
bc loop<br />
lr $9,A ; This has the bit corresponding to the correct button the user must press<br />
<br />
pi prompt <br />
; This displays the number (with '?'), and waits for input and delays briefly<br />
; There is no need to write $0 to port 0 to prepare it for input... the prompt<br />
; subroutine will have done so for us... see instructions at $764 in BIOS<br />
ins 0 ; Retrieve console button state<br />
com ; Complement it ($1=but1,$2=but2,$4=but3,$8=but4)<br />
ni $F ; Clip off the top four bits<br />
outs 5 <br />
; Clear the sound register... We know the relevant top two bits of A are clear<br />
xs $9 ; XOR with Reg 9 which contains the correct input<br />
delayforever:<br />
bnz delayforever ; User lost the game. Freeze<br />
<br />
br nextround ; The user entered the correct response. Torture them some more<br />
<br />
<br />
org $fff ; added only to set a useable rom-size in MESS<br />
.byte $ff<br />
<br />
</pre></div>E5froghttp://channelf.se/veswiki/index.php?title=Homebrew:F8_of_Nations&diff=697Homebrew:F8 of Nations2022-09-24T16:05:47Z<p>E5frog: </p>
<hr />
<div><div id="col1" style="width:437px; float: right"><br />
<div style="border: 1px solid #437; padding: 5px; margin: 5px 0; background: #FFE;"><br />
{{#ev:youtube|JVeXk8X7PFg|425}}<br />
''F8 of Nations, color version.''<br />
</div><br />
</div><br />
<br />
Smallest Fairchild Channel F game ever with only 37 Bytes on the black and white version. Uses almost only BIOS routines.<br />
<br />
Unfortunately the original description has been lost but it was something about saving the Earth by pressing the sequence showed as soon as possible.<br />
<br />
Hold the corresponding button when digit is shown, keep holding until it changes.<br />
<br />
The only game to date that uses the console buttons instead of a hand controller.<br />
<br />
<br />
Get the padded versions here: <br><br />
*[[:File:F8ofNations_b-w.bin|Download]] black and white version.<br />
*[[:File:F8ofNations_color&score.bin|Download]] color and score version.<br />
<pre><br />
; F8 of Nations<br />
;<br />
; written by nycurt<br />
<br />
processor f8<br />
<br />
;------------;<br />
; BIOS Calls ;<br />
;------------;<br />
<br />
prompt = $0099<br />
clrscrn = $00D0<br />
IncP1Score = $02AC<br />
<br />
;===================;<br />
; Main Program Code ;<br />
;===================;<br />
<br />
;---------------;<br />
; Program Entry ;<br />
;---------------;<br />
<br />
org $800<br />
<br />
<br />
LR $5,A ; $55 Needs to be at beginning of cartridge<br />
LR $A,A ; Can be anything in this byte. In early versions this was used as code<br />
<br />
<br />
IF 0<br />
If you add the following code to the beginning of the game, the gameplay will be in color and it <br />
will keep track of your score (which wraps around when you get to 99).<br />
<br />
ENDIF<br />
<br />
IF 0<br />
li $99<br />
LISU 2 ; 02b0 6e<br />
LISL 6 ; 02b0 6e<br />
lr I,A<br />
<br />
li $d6<br />
lisu 3<br />
lr S,A<br />
lr 3, A<br />
pi clrscrn<br />
nextround:<br />
LISU 2 ; 02b0 6e<br />
pi IncP1Score<br />
<br />
ENDIF<br />
<br />
nextround:<br />
li $45 ; Bit 6 in this byte is used to emit a sound when written to port 5<br />
outs 5 ; Play a sound<br />
<br />
<br />
<br />
<br />
<br />
; Store $45 in reg0 - $4 specifies blue and $5 the '5' character to the prompt func. This <br />
; register will be decremented 1 to 4 times to select a number from '1' to '4'<br />
lr $0,A <br />
<br />
; And the byte referenced by the DC with $3 - this gives a number from 1 to 4 for the game<br />
lis $3<br />
; The DC is used in addressing memory. The H register will have been initialized to 0 by the BIOS<br />
; before we are started, so we point the DC at 0. Each successive round will advance the DC by<br />
; one byte. The number that is selected (1-4) is determined by the low-order three bits in the<br />
; byte loaded from the DC. If the user plays for a very long time the DC will increment beyond<br />
; valid memory.<br />
lr DC,H<br />
nm ; and #$3 with the memory referenced by the DC<br />
lr H,DC<br />
<br />
; Loop control variable initialized with the # that the user must match<br />
; The value $10 will be shifted right each time through the loop and will match the correct <br />
; input value for the button that corresponds to the number.<br />
lr $9,A<br />
li $10<br />
loop:<br />
sr 1<br />
ds $0 ; Decrement the value that will be sent to prompt (initialized to $45)<br />
ds $9<br />
bc loop<br />
lr $9,A ; This has the bit corresponding to the correct button the user must press<br />
<br />
pi prompt <br />
; This displays the number (with '?'), and waits for input and delays briefly<br />
; There is no need to write $0 to port 0 to prepare it for input... the prompt<br />
; subroutine will have done so for us... see instructions at $764 in BIOS<br />
ins 0 ; Retrieve console button state<br />
com ; Complement it ($1=but1,$2=but2,$4=but3,$8=but4)<br />
ni $F ; Clip off the top four bits<br />
outs 5 <br />
; Clear the sound register... We know the relevant top two bits of A are clear<br />
xs $9 ; XOR with Reg 9 which contains the correct input<br />
delayforever:<br />
bnz delayforever ; User lost the game. Freeze<br />
<br />
br nextround ; The user entered the correct response. Torture them some more<br />
<br />
<br />
org $fff ; added only to set a useable rom-size in MESS<br />
.byte $ff<br />
<br />
</pre></div>E5froghttp://channelf.se/veswiki/index.php?title=Main_Page&diff=696Main Page2022-09-19T19:49:00Z<p>E5frog: /* Information in pdf:s */</p>
<hr />
<div>Welcome to the [[Channel F|VES]] wiki! Here you can find out user-donated information on all sorts of programming info for the Channel F. __NOTOC__<br />
<br />
<div id="col1" style="width: 30%; float: right"><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
== Channel F Information ==<br />
'''Hardware'''<br />
* [[Schematics]]<br />
* [[Pinouts]]<br />
* [[Resolution]]<br />
* [[Register]]s<br />
* [[F8]]<br />
* [[ROMC|ROMC explained]]<br />
* [[RAM]]<br />
* [[VRAM]]<br />
* [[Port|Ports]]<br />
* [[Modding]]<br />
'''Programming:'''<br />
* [[Opcode]]s<br />
* [[Accessing VRAM]]<br />
* [[Reading Controllers|Reading Controller and Buttons]]<br />
* [[Outputting Sound]]<br />
* [[Subtraction]]<br />
* [[Binary coded decimal]]<br />
* [[Subroutines]]<br />
* [[Ves.h]]<br />
</div><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Snippets ==<br />
* [[Snippet:Blit|Blit subroutine]]<br />
* [[Snippet:Multiblit|Multiblit subroutine]]<br />
* [[Snippet:Plot|Plot subroutine]]<br />
* [[Snippet:Playsong|Playsong subroutine]]<br />
* [[Snippet:Score|Score subroutine]]<br />
** [[Snippet:Music_60.h|Music_60.h]]<br />
* [[Snippet:Pseudorandom numbers|Pseudorandom numbers]]<br />
</div><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Homebrews ==<br />
* [[Homebrew:Cannibal Slug Battle|Cannibal Slug Battle]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:F8 of Nations|F8 of Nations]] by Nycurt<br />
* [[Homebrew:Fullscreenpicture|Full screen picture]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:International Karate|International Karate]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Lights Out|Lights Out]] by Sean Riddle<br />
* [[Homebrew:Multi-Cart Menu|Multi-Cart Menu]] by Sean Riddle and [[User:E5frog|e5frog]]<br />
* [[Homebrew:Pac-Man|Pac-Man]] by Blackbird and [[User:E5frog|e5frog]]<br />
* [[Homebrew:RAM test|RAM test]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Scrolling Mountains|Scrolling Mountains]] by Curtdawg<br />
* [[Homebrew:Test Controls|Test Controls]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Tetris|Tetris for 1 or 2 players]] by Peter Trauner<br />
* [[Homebrew:Music|Homebrew Music]]<br />
* [[Homebrew:CCtro|256 Byte intro]]<br />
</div><br />
<br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Tools ==<br />
* [[DASM]]<br />
* [[f8tool|F8tool]]<br />
* [[Graphics converter]]<br />
** [[For full screen]]<br />
* [[Videocart dumper]]<br />
</div><br />
<br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Disassemblies ==<br />
* [[Disassembly:Bios|Channel F Bios]]<br />
* [[Disassembly:Videocart 1|Videocart 1 - Tic-Tac-Toe, etc]]<br />
* [[Disassembly:Videocart 2|Videocart 2 - Desert Fox, etc]]<br />
* [[Disassembly:Videocart 3|Videocart 3 - Video Blackjack]]<br />
* [[Disassembly:Videocart 4|Videocart 4 - Spitfire]]<br />
* [[Disassembly:Videocart 5|Videocart 5 - Space War]]<br />
* [[Disassembly:Videocart 6|Videocart 6 - Math Quiz]]<br />
* [[Disassembly:Videocart 7|Videocart 7 - Math Quiz II]]<br />
* [[Disassembly:Videocart 8|Videocart 8 - Magic Numbers, etc]]<br />
* [[Disassembly:Videocart 9|Videocart 9 - Drag Race]]<br />
* [[Disassembly:Videocart 10|Videocart 10 - Maze]]<br />
* [[Disassembly:Videocart 10b|Videocart 10b - Maze, code variation]]<br />
* [[Disassembly:Videocart 11|Videocart 11 - Backgammon, etc]]<br />
* [[Disassembly:Videocart 12|Videocart 12 - Baseball]]<br />
* [[Disassembly:Videocart 13|Videocart 13 - Robot War, etc]]<br />
* [[Disassembly:Videocart 14|Videocart 14 - Sonar Search]]<br />
* [[Disassembly:Videocart 15|Videocart 15 - Memory Match]]<br />
* [[Disassembly:Videocart 16|Videocart 16 - Dodge' It]]<br />
* [[Disassembly:Videocart 17|Videocart 17 - Pinball Challenge]]<br />
* [[Disassembly:Videocart 17b|Videocart 17b - Pinball code variation]]<br />
* [[Disassembly:Videocart 18|Videocart 18 - Hangman]]<br />
* [[Disassembly:Videocart 19|Videocart 19 - Checkers]]<br />
* [[Disassembly:Videocart 20|Videocart 20 - Video Whizball]]<br />
* [[Disassembly:Videocart 21|Videocart 21 - Bowling]]<br />
* [[Disassembly:Videocart 22|Videocart 22 - Slot Machine]]<br />
* [[Disassembly:Videocart 22b|Videocart 22b - Alt. Slot Machine]]<br />
* [[Disassembly:Videocart 23|Videocart 23 - Galactic Space Wars]]<br />
* [[Disassembly:Videocart 24|Videocart 24 - Pro Football]]<br />
* [[Disassembly:Videocart 25|Videocart 25 - Casino Poker]]<br />
* [[Disassembly:Videocart 26|Videocart 26 - Alien Invasion]]<br />
* [[Disassembly:SABA Videoplay 1|SABA Videoplay 1 - M&uuml;hle, usw]]<br />
* [[Disassembly:SABA Videoplay 16|SABA Videoplay 16 - Rat' mal]]<br />
* [[Disassembly:SABA Videoplay 20|SABA Videoplay 20 - Schach]]<br />
* [[Disassembly:Democart|Democart]]<br />
* [[Disassembly:Democart 2|Democart 2]]<br />
* [[Disassembly:Werbetextcassette electronic partner|Werbetextcassette electronic partner]]<br />
<br />
</div><br />
</div><br />
<br />
<div id="col2" style="width: 69%; float: left"><br />
<br />
== Contribute! ==<br />
<br />
The VESWiki was set up as a repository for information related to the VES and VES programming. Some of the many things we'd like to make available are disassemblies, console or technical information, tutorials and guides for both software and hardware, code snippets, and complete games. We encourage you to add any information you have, or to make a page promoting your own game (which you can host here, if you like).<br />
<br />
== Getting Started ==<br />
<br />
If you'd like to get started programming games for the Channel F, try downloading the <br>[https://channelf.se/veswiki/images/9/99/Devel.7z Development Pack (.7z, 2.8 MB)]. <br>It includes the DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game that you can edit, compile and test. Just unpack it, preferably directly on root of your hard drive and doubleclick '''..\devel\games\pacman\!compile+run.bat''' or the '''!run.bat''' in the same directory and it should start right up. Press Esc to leave the debugger. <br> It has been tested (and is working) on Windows XP Home SP3.<br><br><br />
Here's a tutorial that might be helpful: <br />
[[Tutorial:Beginner%27s_Guide_to_the_Channel_F | Beginner's guide to the Channel F]]<br />
<br>Read up on the guides and have fun!<br><br />
<br />
== Useful external links ==<br />
(all links working June 21st 2020)<br />
<br />
* [http://www.freelists.org/list/channelf Channel F Programming List]<br />
* [http://seanriddle.com/chanf.html Sean Riddle's Channel F Info]<br />
* [http://seanriddle.com/chanfmulti.html Sean Riddle's Channel F Multicart]<br />
* [http://seanriddle.com/chanfinfo.html Sean Riddle's Channel F Programming Info]<br />
* [http://www.nyx.net/~lturner/public_html/Fairchild_F8.html Lowell O. Turner's Home Page- Fairchild F8 Info]<br />
* [http://www.nyx.net/~lturner/public_html/F8_ins.html Lowell O. Turner's Home Page- Fairchild F8 Instruction Set]<br />
<br />
== Information in pdf:s ==<br />
<br />
Here are complete Guides in pdf format on how to program a F8 processor system: <br><br />
[https://channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming (.pdf, 7.57 MB)]<br><br />
[https://channelf.se/files/channelf/F8_Guide_to_Programming_old.pdf F8 Guide to Programming b/w(.pdf, 3.42 MB)]<br><br />
<br />
[https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8 User's Guide (1976)(Fairchild) (.pdf, 13.8 MB)]<br />
<br />
These are a few shorter pdf:s with information on the F8 system and its circuits: <br><br />
[https://channelf.se/files/channelf/f8_general_info.pdf F8 general info (.pdf, 146kB)]<br />
<br><br />
[https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)]<br><br />
<br />
[https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8 info by Terry Polhoff (.pdf, 698kB)]<br><br />
[https://channelf.se/files/channelf/f3851_56.pdf F3851+56 Program Storage Unit (.pdf, 1.5MB)]<br><br />
[https://channelf.se/files/channelf/f3852_53.pdf F3852+53 Dynamic and Static Memory Interface (.pdf, 720kB)]<br><br />
<br><br />
[https://channelf.se/veswiki/images/1/1d/Fairchild_Service_Manual.pdf Service manual, Repair information (.pdf, 409kB)]</div>E5froghttp://channelf.se/veswiki/index.php?title=F8&diff=695F82022-09-12T14:41:43Z<p>E5frog: /* 3899 PSU */</p>
<hr />
<div>F8 is a processor system which is used in the Fairchild Video Entertainment System (Channel F) and other machines (VideoBrain is worth mentioning). <br />
The smallest usable system usually contains a Central Processing Unit (CPU) 3850 and a Program Storage Unit (PSU) 3851 with 1kB space. <br><br />
The 3850 is an 8-bit processor with 64 bytes of on-chip [[RAM]] and the first PSUs could generally hold 1kB of [[ROM]] data. To keep the chip pin count down the F8 system doesn't have an address bus but instead each chip in the system has it's own program counter. Control signals are sent to all chips in the system using five ROMC signals. Very innovative for its time.<br><br />
<br><br />
Chips are listed below:<br><br />
<br><br />
== 3850 CPU ==<br />
'''Central Processing Unit'''<br><br />
Arithmetic Unit<br><br />
Accumulator<br><br />
64 Byte scratchpad<br><br />
Interrupt Logic<br><br />
Two I/O-ports<br><br />
Max 1 in System<br><br />
<br />
== 3851 PSU ==<br />
'''Program Storage Unit'''<br><br />
1kB ROM<br><br />
Control Bus 5 Lines<br><br />
Program Counter<br><br />
Stack Register<br><br />
1 Data Counter<br><br />
Timer<br><br />
Interrupt Logic<br><br />
Two I/O-ports<br><br />
Max 63 in System<br><br />
<br />
== 3852 DMI ==<br />
'''Dynamic Memory Interface'''<br><br />
Control Bus 5 Lines<br><br />
Program Counter<br><br />
Stack Register<br><br />
2 Data Counters<br><br />
16 Line Address Bus<br><br />
Max 1 in System<br><br />
<br />
== 3853 SMI ==<br />
'''Static Memory Interface'''<br><br />
Control Bus 5 Lines<br><br />
Program Counter<br><br />
Stack Register<br><br />
2 Data Counters<br><br />
16 Line Address Bus<br><br />
Max 1 in System<br><br />
<br />
== 3854 DMA ==<br />
'''Direct Memory Access Controller'''<br><br />
16 Line Address Bus<br><br />
Max 4 in System<br><br />
<br />
== 3856 PSU ==<br />
'''2kB Program Storage Unit'''<br><br />
Control Bus 5 Lines<br><br />
Program Counter<br><br />
Stack Register<br><br />
2 Data Counters<br><br />
Timer<br><br />
Interrupt Logic<br><br />
Two I/O-ports<br><br />
Max 31 in System<br><br />
<br />
== 3857 SMI/PSU == <br />
'''2kB Static Memory Interface and <br><br />
Program Storage Unit'''<br><br />
Control Bus 5 Lines<br><br />
Program Counter<br><br />
Stack Register<br><br />
2 Data Counters<br><br />
16 Line Address Bus<br><br />
Timer<br><br />
Interrupt Logic<br><br />
Max 1 in System<br><br />
<br />
== 3859 ==<br />
3850 + 3851<br />
<br />
== 3861 PIO ==<br />
'''Peripheral Input/Output'''<br><br />
Two I/O-ports<br><br />
Max 62 in System<br><br />
<br />
== 3870 ==<br />
'''Single chip Microcomputer'''<br><br />
Basically 3850 + 3856<br><br />
Four I/O-Ports (0,1,4,5)<br><br />
64 Byte Scratchpad RAM<br><br />
<br />
== 3871 PIO ==<br />
'''Peripheral Input/Output'''<br><br />
Two I/O-ports<br><br />
Max 62 in System<br><br />
<br />
== 3872 ==<br />
'''Single chip Microcomputer'''<br><br />
Basically 3850 + 3851<br><br />
Four I/O-Ports (0,1,4,5)<br><br />
1, 2, 3 or 4kB ROM<br><br />
64 Byte Scratchpad RAM<br><br />
64 Byte RAM<br><br />
Same Pinout as 3870<br><br />
<br />
== 3899 PSU ==<br />
'''Program Storage Unit'''<br><br />
1kB ROM<br><br />
No ports, no timer nor interrupt<br><br />
Max 63 in System<br><br />
<br />
<br><br />
<br />
== Read more ==<br />
<br />
Read more in [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8_User's_Guide_(1976)(Fairchild) (.pdf 13.8MB)]<br><br />
[http://seanriddle.com/fairchild%20micromachine.pdf Fairchild Microcomputers (.pdf 780kB)]<br><br />
<br />
== External Links ==<br />
<br />
http://www.nyx.net/~lturner/public_html/Fairchild_F8.html</div>E5froghttp://channelf.se/veswiki/index.php?title=Schematics&diff=694Schematics2022-06-28T21:32:16Z<p>E5frog: </p>
<hr />
<div>The following two images are redrawn from poor quality original scans, they have been<br><br />
thoroughly checked and conformity is believed to be 100.0% informationwise.<br><br />
... however, should you find any errors, please let me know.<br />
<br />
[[File:FVE100_schematic_sheet_1of3.gif|600px|thumb|none|link=https://channelf.se/veswiki/images/3/31/FVE100_schematic_sheet_1of3.gif]][[File:FVE_schematic_sheet_2_of_3.png|600px|thumb|none|link=https://channelf.se/veswiki/images/0/04/FVE_schematic_sheet_2_of_3.png]]<br />
<br><br />
<br><br />
These are the official service manuals for the two Luxor models, <br><br />
the early model has a service tip sheet (for common problems) included. <br />
<br><br />
<br><br />
{|<br />
|Luxor Service Manual TV Computer Game 1909574<br/> (pdf 8.63MB)<br />
|<br />
|Luxor Service Manual TV Computer Game 1909583<br/> (pdf 12.43MB)<br />
|-<br />
|<br />
[[File:Page1_24c_300dpi_ed.PNG|299px|thumb|none|link=https://channelf.se/veswiki/images/a/a5/Luxor_Service_Manual_1909574.pdf]]<br />
| &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<br />
|<br />
[[File:Luxor_Service_Manual_1909583_1_utsida_v%C3%A4nster_mini.png|300px|thumb|none|link=https://channelf.se/veswiki/images/d/dc/Service_Manual%2C_May_1980%2C_type_1909583%2C_66_79583-01%2C_T5E-1_600dpi_unfold.pdf]]<br />
|}<br />
<br />
<br />
<br><br />
SABA Videplay 2 with a schematic similar to Luxor 1909583 above. <br />
<br />
[[File:SABA_VideoPlay_2_schematic.jpg|600px|thumb|none|link=https://channelf.se/veswiki/images/8/8d/SABA_VideoPlay_2_schematic.jpg]]</div>E5froghttp://channelf.se/veswiki/index.php?title=Schematics&diff=693Schematics2022-06-28T21:31:28Z<p>E5frog: </p>
<hr />
<div>The following two images are redrawn from poor quality original scans, they have been<br><br />
thoroughly checked and conformity is believed to be 100.0% informationwise.<br><br />
... however, should you find any errors, please let me know.<br />
<br />
[[File:FVE100_schematic_sheet_1of3.gif|600px|thumb|none|link=https://channelf.se/veswiki/images/3/31/FVE100_schematic_sheet_1of3.gif]][[File:FVE_schematic_sheet_2_of_3.png|600px|thumb|none|link=https://channelf.se/veswiki/images/0/04/FVE_schematic_sheet_2_of_3.png]]<br />
<br><br />
<br><br />
These are the official service manuals for the two Luxor models, <br><br />
the early model has a service tip sheet (for common problems) included. <br />
<br><br />
<br><br />
{|<br />
|Luxor Service Manual TV Computer Game 1909574 (pdf 8.63MB)<br />
|<br />
|Luxor Service Manual TV Computer Game 1909583 (pdf 12.43MB)<br />
|-<br />
|<br />
[[File:Page1_24c_300dpi_ed.PNG|299px|thumb|none|link=https://channelf.se/veswiki/images/a/a5/Luxor_Service_Manual_1909574.pdf]]<br />
| &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<br />
|<br />
[[File:Luxor_Service_Manual_1909583_1_utsida_v%C3%A4nster_mini.png|300px|thumb|none|link=https://channelf.se/veswiki/images/d/dc/Service_Manual%2C_May_1980%2C_type_1909583%2C_66_79583-01%2C_T5E-1_600dpi_unfold.pdf]]<br />
|}<br />
<br />
<br />
<br><br />
SABA Videplay 2 with a schematic similar to Luxor 1909583 above. <br />
<br />
[[File:SABA_VideoPlay_2_schematic.jpg|600px|thumb|none|link=https://channelf.se/veswiki/images/8/8d/SABA_VideoPlay_2_schematic.jpg]]</div>E5froghttp://channelf.se/veswiki/index.php?title=Schematics&diff=692Schematics2022-06-28T21:24:52Z<p>E5frog: </p>
<hr />
<div>The following two images are redrawn from poor quality original scans, they have been<br><br />
thoroughly checked and conformity is believed to be 100.0% informationwise.<br><br />
... however, should you find any errors, please let me know.<br />
<br />
[[File:FVE100_schematic_sheet_1of3.gif|600px|thumb|none|link=https://channelf.se/veswiki/images/3/31/FVE100_schematic_sheet_1of3.gif]][[File:FVE_schematic_sheet_2_of_3.png|600px|thumb|none|link=https://channelf.se/veswiki/images/0/04/FVE_schematic_sheet_2_of_3.png]]<br />
<br><br />
<br><br />
These are the official service manuals for the two Luxor models, <br><br />
the early model has a service tip sheet (for common problems) included. <br />
<br><br />
<br><br />
{|<br />
|Luxor Service Manual TV Computer Game 1909574 (pdf)<br />
|<br />
|Luxor Service Manual TV Computer Game 1909583 (pdf)<br />
|-<br />
|<br />
[[File:Page1_24c_300dpi_ed.PNG|299px|thumb|none|link=https://channelf.se/veswiki/images/a/a5/Luxor_Service_Manual_1909574.pdf]]<br />
| &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<br />
|<br />
[[File:Luxor_Service_Manual_1909583_1_utsida_v%C3%A4nster_mini.png|300px|thumb|none|link=https://channelf.se/veswiki/images/d/dc/Service_Manual%2C_May_1980%2C_type_1909583%2C_66_79583-01%2C_T5E-1_600dpi_unfold.pdf]]<br />
|}<br />
<br />
<br />
<br><br />
SABA Videplay 2 with a schematic similar to Luxor 1909583 above. <br />
<br />
[[File:SABA_VideoPlay_2_schematic.jpg|600px|thumb|none|link=https://channelf.se/veswiki/images/8/8d/SABA_VideoPlay_2_schematic.jpg]]</div>E5froghttp://channelf.se/veswiki/index.php?title=Schematics&diff=691Schematics2022-06-28T21:18:47Z<p>E5frog: </p>
<hr />
<div>The following two images are redrawn from poor quality original scans, they have been<br><br />
thoroughly checked and conformity is believed to be 100.0% informationwise.<br><br />
... however, should you find any errors, please let me know.<br />
<br />
[[File:FVE100_schematic_sheet_1of3.gif|600px|thumb|none|link=https://channelf.se/veswiki/images/3/31/FVE100_schematic_sheet_1of3.gif]][[File:FVE_schematic_sheet_2_of_3.png|600px|thumb|none|link=https://channelf.se/veswiki/images/0/04/FVE_schematic_sheet_2_of_3.png]]<br />
<br><br />
<br><br />
These are the official service manuals for the two Luxor models, <br><br />
the early model has a service tip sheet (for common problems) included. <br />
<br><br />
<br><br />
{|<br />
|Luxor Service Manual TV Computer Game 1909574 (pdf)<br />
|<br />
|Luxor Service Manual TV Computer Game 1909583 (pdf)<br />
|-<br />
|<br />
[[File:Page1_24c_300dpi_ed.PNG|299px|thumb|none|link=https://channelf.se/veswiki/images/a/a5/Luxor_Service_Manual_1909574.pdf]]<br />
| &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<br />
|<br />
[[File:Luxor_Service_Manual_1909583_1_utsida_v%C3%A4nster_mini.png|300px|thumb|none|link=https://channelf.se/veswiki/images/d/dc/Service_Manual%2C_May_1980%2C_type_1909583%2C_66_79583-01%2C_T5E-1_600dpi_unfold.pdf]]<br />
|}<br />
<br />
<br />
<br><br />
SABA Videplay 2 with a schematic similar to Luxor 1909583 above. <br />
<br />
[[File:SABA_VideoPlay_2_schematic.jpg|600px|thumb|none|SABA VideoPlay 2 Schematic. [https://channelf.se/veswiki/images/8/8d/SABA_VideoPlay_2_schematic.jpg <br> Click to view full resolution] ]]</div>E5froghttp://channelf.se/veswiki/index.php?title=Schematics&diff=690Schematics2022-06-28T21:14:42Z<p>E5frog: </p>
<hr />
<div>The following two images are redrawn from poor quality original scans, they have been<br><br />
thoroughly checked and conformity is believed to be 100.0% informationwise.<br><br />
... however, should you find any errors, please let me know.<br />
<br />
[[File:FVE100_schematic_sheet_1of3.gif|600px|thumb|none|link=https://channelf.se/veswiki/images/3/31/FVE100_schematic_sheet_1of3.gif]][[File:FVE_schematic_sheet_2_of_3.png|600px|thumb|none|link=https://channelf.se/veswiki/images/0/04/FVE_schematic_sheet_2_of_3.png]]<br />
<br><br />
Here are the official service manuals for the two Luxor models:<br />
<br />
{|<br />
|Luxor Service Manual TV Computer Game 1909574 (pdf)<br />
|<br />
|Luxor Service Manual TV Computer Game 1909583 (pdf)<br />
|-<br />
|<br />
[[File:Page1_24c_300dpi_ed.PNG|299px|thumb|none|link=https://channelf.se/veswiki/images/a/a5/Luxor_Service_Manual_1909574.pdf]]<br />
| &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<br />
|<br />
[[File:Luxor_Service_Manual_1909583_1_utsida_v%C3%A4nster_mini.png|300px|thumb|none|link=https://channelf.se/veswiki/images/d/dc/Service_Manual%2C_May_1980%2C_type_1909583%2C_66_79583-01%2C_T5E-1_600dpi_unfold.pdf]]<br />
|}<br />
<br />
<br />
<br><br />
SABA Videplay 2 with a schematic similar to Luxor 1909583 above. <br />
<br />
[[File:SABA_VideoPlay_2_schematic.jpg|600px|thumb|none|SABA VideoPlay 2 Schematic. [https://channelf.se/veswiki/images/8/8d/SABA_VideoPlay_2_schematic.jpg <br> Click to view full resolution] ]]</div>E5froghttp://channelf.se/veswiki/index.php?title=Schematics&diff=689Schematics2022-06-28T20:59:18Z<p>E5frog: </p>
<hr />
<div>The following two images are redrawn from poor quality original scans, they have been<br><br />
thoroughly checked and conformity is believed to be 100.0% informationwise.<br><br />
... however, should you find any errors, please let me know.<br />
<br />
[[File:FVE100_schematic_sheet_1of3.gif|600px|thumb|none|link=https://channelf.se/veswiki/images/3/31/FVE100_schematic_sheet_1of3.gif]][[File:FVE_schematic_sheet_2_of_3.png|600px|thumb|none|link=https://channelf.se/veswiki/images/0/04/FVE_schematic_sheet_2_of_3.png]]<br />
<br><br />
Luxor Service Manual TV Computer Game 1909574 (pdf)<br />
<br />
[[File:Page1_24c_300dpi_ed.PNG|300px|thumb|none|link=https://channelf.se/veswiki/images/a/a5/Luxor_Service_Manual_1909574.pdf]]<br />
<br />
<br><br />
Luxor Service Manual TV Computer Game 1909583 (pdf)<br />
<br />
[[File:Luxor_Service_Manual_1909583_1_utsida_v%C3%A4nster_mini.png|300px|thumb|none|link=https://channelf.se/veswiki/images/d/dc/Service_Manual%2C_May_1980%2C_type_1909583%2C_66_79583-01%2C_T5E-1_600dpi_unfold.pdf]]<br />
<br />
<br><br />
SABA Videplay 2 with a schematic similar to Luxor 1909583 above. <br />
<br />
[[File:SABA_VideoPlay_2_schematic.jpg|600px|thumb|none|SABA VideoPlay 2 Schematic. [https://channelf.se/veswiki/images/8/8d/SABA_VideoPlay_2_schematic.jpg <br> Click to view full resolution] ]]</div>E5froghttp://channelf.se/veswiki/index.php?title=Schematics&diff=688Schematics2022-06-28T20:43:52Z<p>E5frog: </p>
<hr />
<div>The following two images are redrawn from poor quality original scans but are<br><br />
checked thoroughly and conformity is believed to be 100.0% informationwise.<br><br />
However, should you find any errors, please let me know.<br />
<br />
[[File:FVE100_schematic_sheet_1of3.gif|600px|thumb|none|FVE100 Schematic page 1. [https://channelf.se/veswiki/images/3/31/FVE100_schematic_sheet_1of3.gif <br> Click to view full resolution] ]]<br />
<br />
[[File:FVE_schematic_sheet_2_of_3.png|600px|thumb|none|FVE100 Schematic page 2. [https://channelf.se/veswiki/images/0/04/FVE_schematic_sheet_2_of_3.png <br> Click to view full resolution] ]]<br />
<br><br />
Luxor TV Computer Game 1909574<br />
<br />
[[File:Page1_24c_300dpi_ed.PNG|400px|thumb|none|Luxor Service Manual TV Computer Game pdf.[https://channelf.se/veswiki/images/a/a5/Luxor_Service_Manual_1909574.pdf <br> Click to view full pdf] ]]<br />
<br />
[[File:Luxor_page2_300dpi.png|150px|thumb|none|Luxor Service Manual TV Computer Game page 2.[https://channelf.se/veswiki/images/3/35/Luxor_page2_300dpi.png <br> Click to view full resolution] ]][[File:Luxor_page3_300dpi.png|150px|thumb|none|Luxor Service Manual TV Computer Game page 3.[https://channelf.se/veswiki/images/2/23/Luxor_page3_300dpi.png <br> Click to view full resolution] ]]<br />
<br />
<br />
<br><br />
Luxor TV Computer Game 1909583<br />
<br />
[[File:Luxor_Service_Manual_1909583_1_utsida_v%C3%A4nster_mini.png|300px|thumb|none|Luxor Service Manual 1909583 pdf.[https://channelf.se/veswiki/images/d/dc/Service_Manual%2C_May_1980%2C_type_1909583%2C_66_79583-01%2C_T5E-1_600dpi_unfold.pdf <br> Click to view full pdf] ]]<br />
<br />
<br><br />
The much simpler SABA Videoplay 2 schematic with it's VLSI circuits<br />
<br />
[[File:SABA_VideoPlay_2_schematic.jpg|600px|thumb|none|SABA VideoPlay 2 Schematic. [https://channelf.se/veswiki/images/8/8d/SABA_VideoPlay_2_schematic.jpg <br> Click to view full resolution] ]]</div>E5froghttp://channelf.se/veswiki/index.php?title=File:Page1_24c_300dpi_ed.PNG&diff=687File:Page1 24c 300dpi ed.PNG2022-06-28T20:40:56Z<p>E5frog: E5frog uploaded a new version of File:Page1 24c 300dpi ed.PNG</p>
<hr />
<div>Pdf manual front page</div>E5froghttp://channelf.se/veswiki/index.php?title=File:Luxor_Service_Manual_1909583_1_utsida_v%C3%A4nster_mini.png&diff=686File:Luxor Service Manual 1909583 1 utsida vänster mini.png2022-06-28T20:34:40Z<p>E5frog: </p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=File:Service_Manual,_May_1980,_type_1909583,_66_79583-01,_T5E-1_600dpi_unfold.pdf&diff=685File:Service Manual, May 1980, type 1909583, 66 79583-01, T5E-1 600dpi unfold.pdf2022-06-28T20:26:11Z<p>E5frog: </p>
<hr />
<div></div>E5froghttp://channelf.se/veswiki/index.php?title=File:Luxor_Service_Manual_1909574.pdf&diff=684File:Luxor Service Manual 1909574.pdf2022-06-28T20:20:29Z<p>E5frog: E5frog uploaded a new version of File:Luxor Service Manual 1909574.pdf</p>
<hr />
<div>Service Manual of the Luxor TV Computergame, the first Swedish version of the System Fairchild console. Manual from August 1978.</div>E5froghttp://channelf.se/veswiki/index.php?title=Snippet:Score&diff=683Snippet:Score2022-06-14T07:09:52Z<p>E5frog: </p>
<hr />
<div>When coding a game you usually want to add some kind of scoring. This is an example of an eight digit scoring method using decimal add. Decimal add is done using [[Binary coded decimal]] (BCD). If adding a hexadecimal number you first need to add $66 before using the ASD op-code.<br />
<br />
In the example below the BCD score is held in scratchpad registers from 37 down to 34 going backwards and adding up from least significant to most significant. Score is added using the 16-bit Q and K registers, which are 32 bits in total and we store two decimal digits per byte, which means - using decimal mode, we get a score register that can hold 99'999'999 points.<br />
<br />
<br />
<pre><br />
Score:<br />
lisu 3 ; Set scratchpad register<br />
lisl 7<br />
<br />
lr A, QL ; Copy least significant digit (holds 1's and 10's) to A from QL<br />
asd S ; Decimal add scratchpad value from the set 'O'37<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'36<br />
; Two digits done<br />
lr A, QU ; Copy next score byte (100's and 1000's)from QU into A<br />
lnk ; LNK adds carry bit from previous ASD operation<br />
asd S ; Decimal add to scratchpad 'O'36<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'35<br />
; Four digits done<br />
lr A, KL ; Copy next byte from KL (10'000 and 100'000)<br />
lnk ; Add carry from previous operation<br />
asd S ; Decimal add scratchpad 'O'35<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'34<br />
; Six digts done<br />
lr A, KU ; Load next byte (1'000'000 and 10'000'000)<br />
lnk ; Add carry from previous operation<br />
asd S ; Decimal add scratchpad<br />
lr D, A ; Store result <br />
; 8 digits ALL done<br />
<br />
pop<br />
</pre><br />
<br />
As mentioned, if you want to add a hexadecimal number to a BCD, first make it BCD encoded by adding $66:<br />
<br />
<pre><br />
...<br />
lr A, 2 ; Fetch hexadecimal number from register 2 to be added <br />
ai $66 ; Add $66 to make it BCD compatible<br />
asd S ; Use the decimal add op-code, adding register S<br />
lr S, A ; Store BCD sum in register S<br />
...<br />
</pre><br />
<br />
The sum stored in "register S" is then visible as a plain decimal number (in a memory debug window). "10" means decimal 10, "29" means decimal 29.<br />
It's very handy if then plotting the digits as a decimal number as they can easily be masked with SL and SR without the need for a conversion.</div>E5froghttp://channelf.se/veswiki/index.php?title=Snippet:Score&diff=682Snippet:Score2022-06-14T06:47:00Z<p>E5frog: </p>
<hr />
<div>When coding a game you usually want to add some kind of scoring. This is an example of an eight digit scoring method using decimal add. Decimal add is done using [[Binary coded decimal]] or BCD, if adding two decimal numbers (BCD encoded) you'll simply use it directly. If adding a hexadecimal number you first need to add $66 before using the ASD op-code to convert it to BCD.<br />
<br />
In the example below the BCD score is held in scratchpad registers from 37 down to 34 going backwards and adding up from least significant to most significant. Score is added using the 16-bit Q and K registers, which are 32 bits in total and we store two decimal digits per byte, which means - using decimal mode, we get a score register that can hold 99'999'999 points.<br />
<br />
<br />
<pre><br />
Score:<br />
lisu 3 ; Set scratchpad register<br />
lisl 7<br />
<br />
lr A, QL ; Copy least significant digit (holds 1's and 10's) to A from QL<br />
asd S ; Decimal add scratchpad value from the set 'O'37<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'36<br />
; Two digits done<br />
lr A, QU ; Copy next score byte (100's and 1000's)from QU into A<br />
lnk ; LNK adds carry bit from previous ASD operation<br />
asd S ; Decimal add to scratchpad 'O'36<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'35<br />
; Four digits done<br />
lr A, KL ; Copy next byte from KL (10'000 and 100'000)<br />
lnk ; Add carry from previous operation<br />
asd S ; Decimal add scratchpad 'O'35<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'34<br />
; Six digts done<br />
lr A, KU ; Load next byte (1'000'000 and 10'000'000)<br />
lnk ; Add carry from previous operation<br />
asd S ; Decimal add scratchpad<br />
lr D, A ; Store result <br />
; 8 digits ALL done<br />
<br />
pop<br />
</pre><br />
<br />
As mentioned, if you want to add a hexadecimal number to a BCD, first make it BCD encoded by adding $66:<br />
<br />
<pre><br />
...<br />
lr A, 2 ; Fetch hexadecimal number from register 2 to be added <br />
ai $66 ; Add $66 to make it BCD compatible<br />
asd S ; Use the decimal add op-code, adding register S<br />
lr S, A ; Store BCD sum in register S<br />
...<br />
</pre><br />
<br />
The sum stored in "register S" is then visible as a plain decimal number (in a memory debug window). "10" means decimal 10, "29" means decimal 29.<br />
It's very handy if then plotting the digits as a decimal number as they can easily be masked with SL and SR without the need for a conversion.</div>E5froghttp://channelf.se/veswiki/index.php?title=Snippet:Score&diff=681Snippet:Score2022-06-14T06:44:08Z<p>E5frog: </p>
<hr />
<div>When coding a game you usually want to add some kind of scoring. This is an example of an eight digit scoring method using decimal add. Decimal add is done using [[Binary coded decimal]] or BCD, if adding two decimal numbers (BCD encoded) you'll simply use it directly. If adding a hexadecimal number you first need to add $66 before using the ASD op-code to convert it to BCD.<br />
<br />
In the example below the BCD score is held in scratchpad registers from 37 down to 34 going backwards and adding up from least significant to most significant. Score is added using the 16-bit Q and K registers, which are 32 bits in total and we store two decimal digits per byte, which means - using decimal mode, we get a score register that can hold 99'999'999 points.<br />
<br />
<br />
<pre><br />
score.add:<br />
lisu 3 ; Set scratchpad register<br />
lisl 7<br />
<br />
lr A, QL ; Copy least significant digit (holds 1's and 10's) to A from QL<br />
asd S ; Decimal add scratchpad value from the set 'O'37<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'36<br />
; Two digits done<br />
lr A, QU ; Copy next score byte (100's and 1000's)from QU into A<br />
lnk ; LNK adds carry bit from previous ASD operation<br />
asd S ; Decimal add to scratchpad 'O'36<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'35<br />
; Four digits done<br />
lr A, KL ; Copy next byte from KL (10'000 and 100'000)<br />
lnk ; Add carry from previous operation<br />
asd S ; Decimal add scratchpad 'O'35<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'34<br />
; Six digts done<br />
lr A, KU ; Load next byte (1'000'000 and 10'000'000)<br />
lnk ; Add carry from previous operation<br />
asd S ; Decimal add scratchpad<br />
lr D, A ; Store result <br />
; 8 digits ALL done<br />
<br />
pop<br />
</pre><br />
<br />
As mentioned, if you want to add a hexadecimal number to a BCD, first make it BCD encoded by adding $66:<br />
<br />
<pre><br />
...<br />
lr A, 2 ; Fetch hexadecimal number from register 2 to be added <br />
ai $66 ; Add $66 to make it BCD compatible<br />
asd S ; Use the decimal add op-code, adding register S<br />
lr S, A ; Store BCD sum in register S<br />
...<br />
</pre><br />
<br />
The sum stored in "register S" is then visible as a plain decimal number (in a memory debug window). "10" means decimal 10, "29" means decimal 29.<br />
It's very handy if then plotting the digits as a decimal number as they can easily be masked with SL and SR without the need for a conversion.</div>E5froghttp://channelf.se/veswiki/index.php?title=Snippet:Score&diff=680Snippet:Score2022-06-13T17:52:20Z<p>E5frog: </p>
<hr />
<div>When coding a game you usually want to add some kind of scoring. This is an example of an eight digit scoring method using decimal add. Decimal add is done using [[Binary coded decimal]], which basically means you add 6 to the decimal number and use the interval 0x06-0x0F to represent 0-9.<br />
<br />
In the example below the score is held in scratchpad registers from 37 down to 34 going backwards and adding up from least significant to most significant. Score is added using the 16-bit Q and K registers, which are 32 bits in total and we store two decimal digits per byte, which means - using decimal mode, we get a score register that can hold 99'999'999 points.<br />
<br />
<br />
<pre><br />
score.add:<br />
lisu 3 ; Set scratchpad register<br />
lisl 7<br />
<br />
lr A, QL ; Copy least significant digit (holds 1's and 10's) to A from QL<br />
asd S ; Decimal add scratchpad value from the set 'O'37<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'36<br />
; Two digits done<br />
lr A, QU ; Copy next score byte (100's and 1000's)from QU into A<br />
lnk ; LNK adds carry bit from previous ASD operation<br />
asd S ; Decimal add to scratchpad 'O'36<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'35<br />
; Four digits done<br />
lr A, KL ; Copy next byte from KL (10'000 and 100'000)<br />
lnk ; Add carry from previous operation<br />
asd S ; Decimal add scratchpad 'O'35<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'34<br />
; Six digts done<br />
lr A, KU ; Load next byte (1'000'000 and 10'000'000)<br />
lnk ; Add carry from previous operation<br />
asd S ; Decimal add scratchpad<br />
lr D, A ; Store result <br />
; 8 digits ALL done<br />
</pre></div>E5froghttp://channelf.se/veswiki/index.php?title=Binary_coded_decimal&diff=679Binary coded decimal2022-06-13T17:45:09Z<p>E5frog: </p>
<hr />
<div>'''Binary coded decimal''' ('''BCD''') is a method by which 4-bit numbers are represented in digits 0-9, not 0-F. In the [[F8]], BCD numbers can be added together using '''ASD''' or from memory using '''AMD''' (there is, however, no '''AID''' [[opcode]], BCD Add Immediate). In a single byte, two digits can be stored, and the appropriate carry flags set if the number rolls over 99. Each digit is coded as the number + 6, so 0 should be loaded as 6, 1 as 7, 2 as 8, etc. This table shows the encoding for individual digits:<br />
<br />
<pre><br />
Digit | 4-bit Value<br />
-------------------<br />
0 | %0110<br />
1 | %0111<br />
2 | %1000<br />
3 | %1001<br />
4 | %1010<br />
5 | %1011<br />
6 | %1100<br />
7 | %1101<br />
8 | %1110<br />
9 | %1111<br />
</pre><br />
<br />
It is very handy to use BCD when you need to present understandable numbers on screen like a score or similar data for the user/player.<br><br />
Here's an example used to add up a [[Snippet:Score|Score]].</div>E5froghttp://channelf.se/veswiki/index.php?title=Snippet:Score&diff=678Snippet:Score2022-06-13T15:01:28Z<p>E5frog: Created page with "When coding a game you usually want to add some kind of scoring. This is an example of an eight digit scoring method using decimal add. In the example below the score is hel..."</p>
<hr />
<div>When coding a game you usually want to add some kind of scoring. This is an example of an eight digit scoring method using decimal add. <br />
<br />
In the example below the score is held in scratchpad registers from 37 down to 34 going backwards and adding up from least significant to most significant. <br />
Score is added using the 16-bit Q and K registers, which are 32 bits in total and we store two decimal digits per byte, which means - using decimal mode, we get a score register that can hold 99'999'999 points.<br />
<br />
<br />
<pre><br />
score.add:<br />
lisu 3 ; Set scratchpad register<br />
lisl 7<br />
<br />
lr A, QL ; Copy least significant digit (holds 1's and 10's) to A from QL<br />
asd S ; Decimal add scratchpad value from the set 'O'37<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'36<br />
; Two digits done<br />
lr A, QU ; Copy next score byte (100's and 1000's)from QU into A<br />
lnk ; LNK adds carry bit from previous ASD operation<br />
asd S ; Decimal add to scratchpad 'O'36<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'35<br />
; Four digits done<br />
lr A, KL ; Copy next byte from KL (10'000 and 100'000)<br />
lnk ; Add carry from previous operation<br />
asd S ; Decimal add scratchpad 'O'35<br />
lr D, A ; Copy result to scratchpad and then decrease it to 'O'34<br />
; Six digts done<br />
lr A, KU ; Load next byte (1'000'000 and 10'000'000)<br />
lnk ; Add carry from previous operation<br />
asd S ; Decimal add scratchpad<br />
lr D, A ; Store result <br />
; 8 digits ALL done<br />
</pre></div>E5froghttp://channelf.se/veswiki/index.php?title=Main_Page&diff=677Main Page2022-06-13T13:23:31Z<p>E5frog: /* Snippets */</p>
<hr />
<div>Welcome to the [[Channel F|VES]] wiki! Here you can find out user-donated information on all sorts of programming info for the Channel F. __NOTOC__<br />
<br />
<div id="col1" style="width: 30%; float: right"><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
== Channel F Information ==<br />
'''Hardware'''<br />
* [[Schematics]]<br />
* [[Pinouts]]<br />
* [[Resolution]]<br />
* [[Register]]s<br />
* [[F8]]<br />
* [[ROMC|ROMC explained]]<br />
* [[RAM]]<br />
* [[VRAM]]<br />
* [[Port|Ports]]<br />
* [[Modding]]<br />
'''Programming:'''<br />
* [[Opcode]]s<br />
* [[Accessing VRAM]]<br />
* [[Reading Controllers|Reading Controller and Buttons]]<br />
* [[Outputting Sound]]<br />
* [[Subtraction]]<br />
* [[Binary coded decimal]]<br />
* [[Subroutines]]<br />
* [[Ves.h]]<br />
</div><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Snippets ==<br />
* [[Snippet:Blit|Blit subroutine]]<br />
* [[Snippet:Multiblit|Multiblit subroutine]]<br />
* [[Snippet:Plot|Plot subroutine]]<br />
* [[Snippet:Playsong|Playsong subroutine]]<br />
* [[Snippet:Score|Score subroutine]]<br />
** [[Snippet:Music_60.h|Music_60.h]]<br />
* [[Snippet:Pseudorandom numbers|Pseudorandom numbers]]<br />
</div><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Homebrews ==<br />
* [[Homebrew:Cannibal Slug Battle|Cannibal Slug Battle]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:F8 of Nations|F8 of Nations]] by Nycurt<br />
* [[Homebrew:Fullscreenpicture|Full screen picture]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:International Karate|International Karate]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Lights Out|Lights Out]] by Sean Riddle<br />
* [[Homebrew:Multi-Cart Menu|Multi-Cart Menu]] by Sean Riddle and [[User:E5frog|e5frog]]<br />
* [[Homebrew:Pac-Man|Pac-Man]] by Blackbird and [[User:E5frog|e5frog]]<br />
* [[Homebrew:RAM test|RAM test]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Scrolling Mountains|Scrolling Mountains]] by Curtdawg<br />
* [[Homebrew:Test Controls|Test Controls]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Tetris|Tetris for 1 or 2 players]] by Peter Trauner<br />
* [[Homebrew:Music|Homebrew Music]]<br />
* [[Homebrew:CCtro|256 Byte intro]]<br />
</div><br />
<br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Tools ==<br />
* [[DASM]]<br />
* [[f8tool|F8tool]]<br />
* [[Graphics converter]]<br />
** [[For full screen]]<br />
* [[Videocart dumper]]<br />
</div><br />
<br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Disassemblies ==<br />
* [[Disassembly:Bios|Channel F Bios]]<br />
* [[Disassembly:Videocart 1|Videocart 1 - Tic-Tac-Toe, etc]]<br />
* [[Disassembly:Videocart 2|Videocart 2 - Desert Fox, etc]]<br />
* [[Disassembly:Videocart 3|Videocart 3 - Video Blackjack]]<br />
* [[Disassembly:Videocart 4|Videocart 4 - Spitfire]]<br />
* [[Disassembly:Videocart 5|Videocart 5 - Space War]]<br />
* [[Disassembly:Videocart 6|Videocart 6 - Math Quiz]]<br />
* [[Disassembly:Videocart 7|Videocart 7 - Math Quiz II]]<br />
* [[Disassembly:Videocart 8|Videocart 8 - Magic Numbers, etc]]<br />
* [[Disassembly:Videocart 9|Videocart 9 - Drag Race]]<br />
* [[Disassembly:Videocart 10|Videocart 10 - Maze]]<br />
* [[Disassembly:Videocart 10b|Videocart 10b - Maze, code variation]]<br />
* [[Disassembly:Videocart 11|Videocart 11 - Backgammon, etc]]<br />
* [[Disassembly:Videocart 12|Videocart 12 - Baseball]]<br />
* [[Disassembly:Videocart 13|Videocart 13 - Robot War, etc]]<br />
* [[Disassembly:Videocart 14|Videocart 14 - Sonar Search]]<br />
* [[Disassembly:Videocart 15|Videocart 15 - Memory Match]]<br />
* [[Disassembly:Videocart 16|Videocart 16 - Dodge' It]]<br />
* [[Disassembly:Videocart 17|Videocart 17 - Pinball Challenge]]<br />
* [[Disassembly:Videocart 17b|Videocart 17b - Pinball code variation]]<br />
* [[Disassembly:Videocart 18|Videocart 18 - Hangman]]<br />
* [[Disassembly:Videocart 19|Videocart 19 - Checkers]]<br />
* [[Disassembly:Videocart 20|Videocart 20 - Video Whizball]]<br />
* [[Disassembly:Videocart 21|Videocart 21 - Bowling]]<br />
* [[Disassembly:Videocart 22|Videocart 22 - Slot Machine]]<br />
* [[Disassembly:Videocart 22b|Videocart 22b - Alt. Slot Machine]]<br />
* [[Disassembly:Videocart 23|Videocart 23 - Galactic Space Wars]]<br />
* [[Disassembly:Videocart 24|Videocart 24 - Pro Football]]<br />
* [[Disassembly:Videocart 25|Videocart 25 - Casino Poker]]<br />
* [[Disassembly:Videocart 26|Videocart 26 - Alien Invasion]]<br />
* [[Disassembly:SABA Videoplay 1|SABA Videoplay 1 - M&uuml;hle, usw]]<br />
* [[Disassembly:SABA Videoplay 16|SABA Videoplay 16 - Rat' mal]]<br />
* [[Disassembly:SABA Videoplay 20|SABA Videoplay 20 - Schach]]<br />
* [[Disassembly:Democart|Democart]]<br />
* [[Disassembly:Democart 2|Democart 2]]<br />
* [[Disassembly:Werbetextcassette electronic partner|Werbetextcassette electronic partner]]<br />
<br />
</div><br />
</div><br />
<br />
<div id="col2" style="width: 69%; float: left"><br />
<br />
== Contribute! ==<br />
<br />
The VESWiki was set up as a repository for information related to the VES and VES programming. Some of the many things we'd like to make available are disassemblies, console or technical information, tutorials and guides for both software and hardware, code snippets, and complete games. We encourage you to add any information you have, or to make a page promoting your own game (which you can host here, if you like).<br />
<br />
== Getting Started ==<br />
<br />
If you'd like to get started programming games for the Channel F, try downloading the <br>[https://channelf.se/veswiki/images/9/99/Devel.7z Development Pack (.7z, 2.8 MB)]. <br>It includes the DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game that you can edit, compile and test. Just unpack it, preferably directly on root of your hard drive and doubleclick '''..\devel\games\pacman\!compile+run.bat''' or the '''!run.bat''' in the same directory and it should start right up. Press Esc to leave the debugger. <br> It has been tested (and is working) on Windows XP Home SP3.<br><br><br />
Here's a tutorial that might be helpful: <br />
[[Tutorial:Beginner%27s_Guide_to_the_Channel_F | Beginner's guide to the Channel F]]<br />
<br>Read up on the guides and have fun!<br><br />
<br />
== Useful external links ==<br />
(all links working June 21st 2020)<br />
<br />
* [http://www.freelists.org/list/channelf Channel F Programming List]<br />
* [http://seanriddle.com/chanf.html Sean Riddle's Channel F Info]<br />
* [http://seanriddle.com/chanfmulti.html Sean Riddle's Channel F Multicart]<br />
* [http://seanriddle.com/chanfinfo.html Sean Riddle's Channel F Programming Info]<br />
* [http://www.nyx.net/~lturner/public_html/Fairchild_F8.html Lowell O. Turner's Home Page- Fairchild F8 Info]<br />
* [http://www.nyx.net/~lturner/public_html/F8_ins.html Lowell O. Turner's Home Page- Fairchild F8 Instruction Set]<br />
<br />
== Information in pdf:s ==<br />
<br />
Here are complete Guides in pdf format on how to program a F8 processor system: <br><br />
[https://channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming (.pdf, 3.42 MB)]<br><br />
[https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8 User's Guide (1976)(Fairchild) (.pdf, 13.8 MB)]<br />
<br />
These are a few shorter pdf:s with information on the F8 system and its circuits: <br><br />
[https://channelf.se/files/channelf/f8_general_info.pdf F8 general info (.pdf, 146kB)]<br />
<br><br />
[https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)]<br><br />
<br />
[https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8 info by Terry Polhoff (.pdf, 698kB)]<br><br />
[https://channelf.se/files/channelf/f3851_56.pdf F3851+56 Program Storage Unit (.pdf, 1.5MB)]<br><br />
[https://channelf.se/files/channelf/f3852_53.pdf F3852+53 Dynamic and Static Memory Interface (.pdf, 720kB)]<br><br />
<br><br />
[https://channelf.se/veswiki/images/1/1d/Fairchild_Service_Manual.pdf Service manual, Repair information (.pdf, 409kB)]</div>E5froghttp://channelf.se/veswiki/index.php?title=Pinouts&diff=676Pinouts2022-05-30T13:26:55Z<p>E5frog: /* Controller connector pinout */</p>
<hr />
<div>== System Fairchild cartridge pinout ==<br />
<br />
{| class="wikitable" style="text-align: center;"<br />
! colspan="2" |[[Image:Cartridge pinout.png]]<br />
|- <br />
|1 GND<br />
|12 ROMC4<br />
|-<br />
|2 GND<br />
|13 PHI<br />
|-<br />
|3 D0<br />
|14 D4<br />
|-<br />
|4 D1<br />
|15 WRITE<br />
|-<br />
|5 /INTREQ<br />
|16 D5<br />
|-<br />
|6 ROMC0<br />
|17 D6<br />
|-<br />
|7 ROMC1<br />
|18 D7<br />
|-<br />
|8 ROMC2<br />
|19 +5V<br />
|-<br />
|9 D2<br />
|20 +5V<br />
|-<br />
|10 ROMC3<br />
|21 Not Connected<br />
|-<br />
|11 D3<br />
|22 +12V<br />
|}<br />
<br />
Dx signals are eight bits of data.<br><br />
PHI is the clock signal.<br><br />
/INTREQ is (hardly ever) used for interrupt.<br><br />
WRITE is the signal for writing data.<br><br />
ROMCx are control signals that all 38xx chips use to control what to put on the bus etc.<br><br />
You can read more about the 32 ROMC-states here on page 20: [https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] or the [[ROMC|ROMC table]].<br><br />
Usually the cartridges have two 3851 [https://channelf.se/veswiki/index.php?title=F8#3851_PSU PSU:s], later carts may have RAM and/or up to three PSU:s <br><br />
and the last released carts seem to use a [https://channelf.se/veswiki/index.php?title=F8#3853_SMI 3853 SMI] chip in combination with a plain ROM chip, <br> <br />
there are other possibilities though.<br />
<br />
== Controller connector pinout ==<br />
<br />
On the Fairchild VES/Channel F, Luxor VES, SABA etc with a fixed controller the pinout of a hand controller is this: <br />
(in the order of the internal 18 pole connector)<br />
<pre><br />
1: black: push down<br />
3: brown: pull up <br />
5: red: clockwise <br />
7: orange: counter-clockwise<br />
9: yellow: forward<br />
11: green: backwards<br />
13: blue: left<br />
15: grey: right<br />
18: white: ground<br />
<br />
Skipped numbers are empty in the connector, 16 is plugged. <br />
Colors vs function are very helpful when resoldering wire in the hand controller.<br />
</pre><br />
<br />
<pre><br />
Channel F II, Grandstand, Nordmende, Luxor 9 pin D-SUB female connector<br />
(called DE9F). Pinout watching the holes on the controller connector:<br />
<br />
5 4 3 2 1<br />
9 8 7 6 <br />
<br />
1: counter-clockwise<br />
2: clockwise<br />
3: pull up<br />
4: push down<br />
5: right<br />
6: forward<br />
7: back<br />
8: left<br />
9: ground<br />
</pre><br />
<br />
== Power pinout ==<br />
<br />
<pre><br />
Luxor Video Entertainment System <br />
<br />
9 VAC between pin 1 and 2 on the 4 pin DIN connector<br />
15 VAC between pin 3 and 4 on the DIN connector<br />
Transformer uses a 80mA slow blow (T) fuse.<br />
<br />
</pre></div>E5froghttp://channelf.se/veswiki/index.php?title=Pinouts&diff=675Pinouts2022-05-30T13:23:51Z<p>E5frog: /* Controller connector pinout */</p>
<hr />
<div>== System Fairchild cartridge pinout ==<br />
<br />
{| class="wikitable" style="text-align: center;"<br />
! colspan="2" |[[Image:Cartridge pinout.png]]<br />
|- <br />
|1 GND<br />
|12 ROMC4<br />
|-<br />
|2 GND<br />
|13 PHI<br />
|-<br />
|3 D0<br />
|14 D4<br />
|-<br />
|4 D1<br />
|15 WRITE<br />
|-<br />
|5 /INTREQ<br />
|16 D5<br />
|-<br />
|6 ROMC0<br />
|17 D6<br />
|-<br />
|7 ROMC1<br />
|18 D7<br />
|-<br />
|8 ROMC2<br />
|19 +5V<br />
|-<br />
|9 D2<br />
|20 +5V<br />
|-<br />
|10 ROMC3<br />
|21 Not Connected<br />
|-<br />
|11 D3<br />
|22 +12V<br />
|}<br />
<br />
Dx signals are eight bits of data.<br><br />
PHI is the clock signal.<br><br />
/INTREQ is (hardly ever) used for interrupt.<br><br />
WRITE is the signal for writing data.<br><br />
ROMCx are control signals that all 38xx chips use to control what to put on the bus etc.<br><br />
You can read more about the 32 ROMC-states here on page 20: [https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] or the [[ROMC|ROMC table]].<br><br />
Usually the cartridges have two 3851 [https://channelf.se/veswiki/index.php?title=F8#3851_PSU PSU:s], later carts may have RAM and/or up to three PSU:s <br><br />
and the last released carts seem to use a [https://channelf.se/veswiki/index.php?title=F8#3853_SMI 3853 SMI] chip in combination with a plain ROM chip, <br> <br />
there are other possibilities though.<br />
<br />
== Controller connector pinout ==<br />
<br />
On the Fairchild VES/Channel F, Luxor VES, SABA etc with a fixed controller the pinout of a hand controller is this: <br />
(in the order of the internal 18 pole connector)<br />
<pre><br />
1: black: push down<br />
3: brown: pull up <br />
5: red: clockwise <br />
7: orange: counter-clockwise<br />
9: yellow: forward<br />
11: green: backwards<br />
13: blue: left<br />
15: grey: right<br />
18: white: ground<br />
<br />
Skipped numbers are empty in the connector, 16 is plugged. <br />
Colors vs function are very helpful when resoldering wire in the hand controller.<br />
</pre><br />
<br />
<pre><br />
Channel F II, Grandstand, Nordmende, Luxor 9 pin D-SUB connector<br />
DE9F connector watching the mating end of the controller's connector:<br />
<br />
5 4 3 2 1<br />
9 8 7 6 <br />
<br />
1: counter-clockwise<br />
2: clockwise<br />
3: pull up<br />
4: push down<br />
5: right<br />
6: forward<br />
7: back<br />
8: left<br />
9: ground<br />
</pre><br />
<br />
== Power pinout ==<br />
<br />
<pre><br />
Luxor Video Entertainment System <br />
<br />
9 VAC between pin 1 and 2 on the 4 pin DIN connector<br />
15 VAC between pin 3 and 4 on the DIN connector<br />
Transformer uses a 80mA slow blow (T) fuse.<br />
<br />
</pre></div>E5froghttp://channelf.se/veswiki/index.php?title=Pinouts&diff=674Pinouts2022-05-30T13:22:26Z<p>E5frog: </p>
<hr />
<div>== System Fairchild cartridge pinout ==<br />
<br />
{| class="wikitable" style="text-align: center;"<br />
! colspan="2" |[[Image:Cartridge pinout.png]]<br />
|- <br />
|1 GND<br />
|12 ROMC4<br />
|-<br />
|2 GND<br />
|13 PHI<br />
|-<br />
|3 D0<br />
|14 D4<br />
|-<br />
|4 D1<br />
|15 WRITE<br />
|-<br />
|5 /INTREQ<br />
|16 D5<br />
|-<br />
|6 ROMC0<br />
|17 D6<br />
|-<br />
|7 ROMC1<br />
|18 D7<br />
|-<br />
|8 ROMC2<br />
|19 +5V<br />
|-<br />
|9 D2<br />
|20 +5V<br />
|-<br />
|10 ROMC3<br />
|21 Not Connected<br />
|-<br />
|11 D3<br />
|22 +12V<br />
|}<br />
<br />
Dx signals are eight bits of data.<br><br />
PHI is the clock signal.<br><br />
/INTREQ is (hardly ever) used for interrupt.<br><br />
WRITE is the signal for writing data.<br><br />
ROMCx are control signals that all 38xx chips use to control what to put on the bus etc.<br><br />
You can read more about the 32 ROMC-states here on page 20: [https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] or the [[ROMC|ROMC table]].<br><br />
Usually the cartridges have two 3851 [https://channelf.se/veswiki/index.php?title=F8#3851_PSU PSU:s], later carts may have RAM and/or up to three PSU:s <br><br />
and the last released carts seem to use a [https://channelf.se/veswiki/index.php?title=F8#3853_SMI 3853 SMI] chip in combination with a plain ROM chip, <br> <br />
there are other possibilities though.<br />
<br />
== Controller connector pinout ==<br />
<br />
On the Fairchild VES/Channel F, Luxor VES, SABA etc with a fixed controller the pinout of a hand controller is this: <br />
(in the order of the internal 18 pole connector)<br />
<pre><br />
1: black: push down<br />
3: brown: pull up <br />
5: red: clockwise <br />
7: orange: counter-clockwise<br />
9: yellow: forward<br />
11: green: backwards<br />
13: blue: left<br />
15: grey: right<br />
18: white: ground<br />
<br />
Skipped numbers are empty in the connector, 16 is plugged. <br />
Colors vs function are very helpful when resoldering wire in the hand controller.<br />
</pre><br />
<br />
<pre><br />
Channel F II, Grandstand, Nordmende, Luxor 9 pin D-SUB connector<br />
DE9F connector watching the mating end of connector:<br />
<br />
5 4 3 2 1<br />
9 8 7 6 <br />
<br />
1: counter-clockwise<br />
2: clockwise<br />
3: pull up<br />
4: push down<br />
5: right<br />
6: forward<br />
7: back<br />
8: left<br />
9: ground<br />
</pre><br />
<br />
== Power pinout ==<br />
<br />
<pre><br />
Luxor Video Entertainment System <br />
<br />
9 VAC between pin 1 and 2 on the 4 pin DIN connector<br />
15 VAC between pin 3 and 4 on the DIN connector<br />
Transformer uses a 80mA slow blow (T) fuse.<br />
<br />
</pre></div>E5froghttp://channelf.se/veswiki/index.php?title=User:E5frog&diff=673User:E5frog2022-04-12T14:11:15Z<p>E5frog: </p>
<hr />
<div>Hey, I'm the guy who writes here.</div>E5froghttp://channelf.se/veswiki/index.php?title=Main_Page&diff=672Main Page2022-04-12T14:10:24Z<p>E5frog: /* Information in pdf:s */</p>
<hr />
<div>Welcome to the [[Channel F|VES]] wiki! Here you can find out user-donated information on all sorts of programming info for the Channel F. __NOTOC__<br />
<br />
<div id="col1" style="width: 30%; float: right"><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
== Channel F Information ==<br />
'''Hardware'''<br />
* [[Schematics]]<br />
* [[Pinouts]]<br />
* [[Resolution]]<br />
* [[Register]]s<br />
* [[F8]]<br />
* [[ROMC|ROMC explained]]<br />
* [[RAM]]<br />
* [[VRAM]]<br />
* [[Port|Ports]]<br />
* [[Modding]]<br />
'''Programming:'''<br />
* [[Opcode]]s<br />
* [[Accessing VRAM]]<br />
* [[Reading Controllers|Reading Controller and Buttons]]<br />
* [[Outputting Sound]]<br />
* [[Subtraction]]<br />
* [[Binary coded decimal]]<br />
* [[Subroutines]]<br />
* [[Ves.h]]<br />
</div><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Snippets ==<br />
* [[Snippet:Blit|Blit subroutine]]<br />
* [[Snippet:Multiblit|Multiblit subroutine]]<br />
* [[Snippet:Plot|Plot subroutine]]<br />
* [[Snippet:Playsong|Playsong subroutine]]<br />
** [[Snippet:Music_60.h|Music_60.h]]<br />
* [[Snippet:Pseudorandom numbers|Pseudorandom numbers]]<br />
</div><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Homebrews ==<br />
* [[Homebrew:Cannibal Slug Battle|Cannibal Slug Battle]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:F8 of Nations|F8 of Nations]] by Nycurt<br />
* [[Homebrew:Fullscreenpicture|Full screen picture]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:International Karate|International Karate]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Lights Out|Lights Out]] by Sean Riddle<br />
* [[Homebrew:Multi-Cart Menu|Multi-Cart Menu]] by Sean Riddle and [[User:E5frog|e5frog]]<br />
* [[Homebrew:Pac-Man|Pac-Man]] by Blackbird and [[User:E5frog|e5frog]]<br />
* [[Homebrew:RAM test|RAM test]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Scrolling Mountains|Scrolling Mountains]] by Curtdawg<br />
* [[Homebrew:Test Controls|Test Controls]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Tetris|Tetris for 1 or 2 players]] by Peter Trauner<br />
* [[Homebrew:Music|Homebrew Music]]<br />
* [[Homebrew:CCtro|256 Byte intro]]<br />
</div><br />
<br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Tools ==<br />
* [[DASM]]<br />
* [[f8tool|F8tool]]<br />
* [[Graphics converter]]<br />
** [[For full screen]]<br />
* [[Videocart dumper]]<br />
</div><br />
<br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Disassemblies ==<br />
* [[Disassembly:Bios|Channel F Bios]]<br />
* [[Disassembly:Videocart 1|Videocart 1 - Tic-Tac-Toe, etc]]<br />
* [[Disassembly:Videocart 2|Videocart 2 - Desert Fox, etc]]<br />
* [[Disassembly:Videocart 3|Videocart 3 - Video Blackjack]]<br />
* [[Disassembly:Videocart 4|Videocart 4 - Spitfire]]<br />
* [[Disassembly:Videocart 5|Videocart 5 - Space War]]<br />
* [[Disassembly:Videocart 6|Videocart 6 - Math Quiz]]<br />
* [[Disassembly:Videocart 7|Videocart 7 - Math Quiz II]]<br />
* [[Disassembly:Videocart 8|Videocart 8 - Magic Numbers, etc]]<br />
* [[Disassembly:Videocart 9|Videocart 9 - Drag Race]]<br />
* [[Disassembly:Videocart 10|Videocart 10 - Maze]]<br />
* [[Disassembly:Videocart 10b|Videocart 10b - Maze, code variation]]<br />
* [[Disassembly:Videocart 11|Videocart 11 - Backgammon, etc]]<br />
* [[Disassembly:Videocart 12|Videocart 12 - Baseball]]<br />
* [[Disassembly:Videocart 13|Videocart 13 - Robot War, etc]]<br />
* [[Disassembly:Videocart 14|Videocart 14 - Sonar Search]]<br />
* [[Disassembly:Videocart 15|Videocart 15 - Memory Match]]<br />
* [[Disassembly:Videocart 16|Videocart 16 - Dodge' It]]<br />
* [[Disassembly:Videocart 17|Videocart 17 - Pinball Challenge]]<br />
* [[Disassembly:Videocart 17b|Videocart 17b - Pinball code variation]]<br />
* [[Disassembly:Videocart 18|Videocart 18 - Hangman]]<br />
* [[Disassembly:Videocart 19|Videocart 19 - Checkers]]<br />
* [[Disassembly:Videocart 20|Videocart 20 - Video Whizball]]<br />
* [[Disassembly:Videocart 21|Videocart 21 - Bowling]]<br />
* [[Disassembly:Videocart 22|Videocart 22 - Slot Machine]]<br />
* [[Disassembly:Videocart 22b|Videocart 22b - Alt. Slot Machine]]<br />
* [[Disassembly:Videocart 23|Videocart 23 - Galactic Space Wars]]<br />
* [[Disassembly:Videocart 24|Videocart 24 - Pro Football]]<br />
* [[Disassembly:Videocart 25|Videocart 25 - Casino Poker]]<br />
* [[Disassembly:Videocart 26|Videocart 26 - Alien Invasion]]<br />
* [[Disassembly:SABA Videoplay 1|SABA Videoplay 1 - M&uuml;hle, usw]]<br />
* [[Disassembly:SABA Videoplay 16|SABA Videoplay 16 - Rat' mal]]<br />
* [[Disassembly:SABA Videoplay 20|SABA Videoplay 20 - Schach]]<br />
* [[Disassembly:Democart|Democart]]<br />
* [[Disassembly:Democart 2|Democart 2]]<br />
* [[Disassembly:Werbetextcassette electronic partner|Werbetextcassette electronic partner]]<br />
<br />
</div><br />
</div><br />
<br />
<div id="col2" style="width: 69%; float: left"><br />
<br />
== Contribute! ==<br />
<br />
The VESWiki was set up as a repository for information related to the VES and VES programming. Some of the many things we'd like to make available are disassemblies, console or technical information, tutorials and guides for both software and hardware, code snippets, and complete games. We encourage you to add any information you have, or to make a page promoting your own game (which you can host here, if you like).<br />
<br />
== Getting Started ==<br />
<br />
If you'd like to get started programming games for the Channel F, try downloading the <br>[https://channelf.se/veswiki/images/9/99/Devel.7z Development Pack (.7z, 2.8 MB)]. <br>It includes the DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game that you can edit, compile and test. Just unpack it, preferably directly on root of your hard drive and doubleclick '''..\devel\games\pacman\!compile+run.bat''' or the '''!run.bat''' in the same directory and it should start right up. Press Esc to leave the debugger. <br> It has been tested (and is working) on Windows XP Home SP3.<br><br><br />
Here's a tutorial that might be helpful: <br />
[[Tutorial:Beginner%27s_Guide_to_the_Channel_F | Beginner's guide to the Channel F]]<br />
<br>Read up on the guides and have fun!<br><br />
<br />
== Useful external links ==<br />
(all links working June 21st 2020)<br />
<br />
* [http://www.freelists.org/list/channelf Channel F Programming List]<br />
* [http://seanriddle.com/chanf.html Sean Riddle's Channel F Info]<br />
* [http://seanriddle.com/chanfmulti.html Sean Riddle's Channel F Multicart]<br />
* [http://seanriddle.com/chanfinfo.html Sean Riddle's Channel F Programming Info]<br />
* [http://www.nyx.net/~lturner/public_html/Fairchild_F8.html Lowell O. Turner's Home Page- Fairchild F8 Info]<br />
* [http://www.nyx.net/~lturner/public_html/F8_ins.html Lowell O. Turner's Home Page- Fairchild F8 Instruction Set]<br />
<br />
== Information in pdf:s ==<br />
<br />
Here are complete Guides in pdf format on how to program a F8 processor system: <br><br />
[https://channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming (.pdf, 3.42 MB)]<br><br />
[https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8 User's Guide (1976)(Fairchild) (.pdf, 13.8 MB)]<br />
<br />
These are a few shorter pdf:s with information on the F8 system and its circuits: <br><br />
[https://channelf.se/files/channelf/f8_general_info.pdf F8 general info (.pdf, 146kB)]<br />
<br><br />
[https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)]<br><br />
<br />
[https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8 info by Terry Polhoff (.pdf, 698kB)]<br><br />
[https://channelf.se/files/channelf/f3851_56.pdf F3851+56 Program Storage Unit (.pdf, 1.5MB)]<br><br />
[https://channelf.se/files/channelf/f3852_53.pdf F3852+53 Dynamic and Static Memory Interface (.pdf, 720kB)]<br><br />
<br><br />
[https://channelf.se/veswiki/images/1/1d/Fairchild_Service_Manual.pdf Service manual, Repair information (.pdf, 409kB)]</div>E5froghttp://channelf.se/veswiki/index.php?title=Main_Page&diff=671Main Page2022-04-12T14:09:05Z<p>E5frog: /* Getting Started */</p>
<hr />
<div>Welcome to the [[Channel F|VES]] wiki! Here you can find out user-donated information on all sorts of programming info for the Channel F. __NOTOC__<br />
<br />
<div id="col1" style="width: 30%; float: right"><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
== Channel F Information ==<br />
'''Hardware'''<br />
* [[Schematics]]<br />
* [[Pinouts]]<br />
* [[Resolution]]<br />
* [[Register]]s<br />
* [[F8]]<br />
* [[ROMC|ROMC explained]]<br />
* [[RAM]]<br />
* [[VRAM]]<br />
* [[Port|Ports]]<br />
* [[Modding]]<br />
'''Programming:'''<br />
* [[Opcode]]s<br />
* [[Accessing VRAM]]<br />
* [[Reading Controllers|Reading Controller and Buttons]]<br />
* [[Outputting Sound]]<br />
* [[Subtraction]]<br />
* [[Binary coded decimal]]<br />
* [[Subroutines]]<br />
* [[Ves.h]]<br />
</div><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Snippets ==<br />
* [[Snippet:Blit|Blit subroutine]]<br />
* [[Snippet:Multiblit|Multiblit subroutine]]<br />
* [[Snippet:Plot|Plot subroutine]]<br />
* [[Snippet:Playsong|Playsong subroutine]]<br />
** [[Snippet:Music_60.h|Music_60.h]]<br />
* [[Snippet:Pseudorandom numbers|Pseudorandom numbers]]<br />
</div><br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Homebrews ==<br />
* [[Homebrew:Cannibal Slug Battle|Cannibal Slug Battle]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:F8 of Nations|F8 of Nations]] by Nycurt<br />
* [[Homebrew:Fullscreenpicture|Full screen picture]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:International Karate|International Karate]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Lights Out|Lights Out]] by Sean Riddle<br />
* [[Homebrew:Multi-Cart Menu|Multi-Cart Menu]] by Sean Riddle and [[User:E5frog|e5frog]]<br />
* [[Homebrew:Pac-Man|Pac-Man]] by Blackbird and [[User:E5frog|e5frog]]<br />
* [[Homebrew:RAM test|RAM test]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Scrolling Mountains|Scrolling Mountains]] by Curtdawg<br />
* [[Homebrew:Test Controls|Test Controls]] by [[User:E5frog|e5frog]]<br />
* [[Homebrew:Tetris|Tetris for 1 or 2 players]] by Peter Trauner<br />
* [[Homebrew:Music|Homebrew Music]]<br />
* [[Homebrew:CCtro|256 Byte intro]]<br />
</div><br />
<br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Tools ==<br />
* [[DASM]]<br />
* [[f8tool|F8tool]]<br />
* [[Graphics converter]]<br />
** [[For full screen]]<br />
* [[Videocart dumper]]<br />
</div><br />
<br />
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;"><br />
<br />
== Disassemblies ==<br />
* [[Disassembly:Bios|Channel F Bios]]<br />
* [[Disassembly:Videocart 1|Videocart 1 - Tic-Tac-Toe, etc]]<br />
* [[Disassembly:Videocart 2|Videocart 2 - Desert Fox, etc]]<br />
* [[Disassembly:Videocart 3|Videocart 3 - Video Blackjack]]<br />
* [[Disassembly:Videocart 4|Videocart 4 - Spitfire]]<br />
* [[Disassembly:Videocart 5|Videocart 5 - Space War]]<br />
* [[Disassembly:Videocart 6|Videocart 6 - Math Quiz]]<br />
* [[Disassembly:Videocart 7|Videocart 7 - Math Quiz II]]<br />
* [[Disassembly:Videocart 8|Videocart 8 - Magic Numbers, etc]]<br />
* [[Disassembly:Videocart 9|Videocart 9 - Drag Race]]<br />
* [[Disassembly:Videocart 10|Videocart 10 - Maze]]<br />
* [[Disassembly:Videocart 10b|Videocart 10b - Maze, code variation]]<br />
* [[Disassembly:Videocart 11|Videocart 11 - Backgammon, etc]]<br />
* [[Disassembly:Videocart 12|Videocart 12 - Baseball]]<br />
* [[Disassembly:Videocart 13|Videocart 13 - Robot War, etc]]<br />
* [[Disassembly:Videocart 14|Videocart 14 - Sonar Search]]<br />
* [[Disassembly:Videocart 15|Videocart 15 - Memory Match]]<br />
* [[Disassembly:Videocart 16|Videocart 16 - Dodge' It]]<br />
* [[Disassembly:Videocart 17|Videocart 17 - Pinball Challenge]]<br />
* [[Disassembly:Videocart 17b|Videocart 17b - Pinball code variation]]<br />
* [[Disassembly:Videocart 18|Videocart 18 - Hangman]]<br />
* [[Disassembly:Videocart 19|Videocart 19 - Checkers]]<br />
* [[Disassembly:Videocart 20|Videocart 20 - Video Whizball]]<br />
* [[Disassembly:Videocart 21|Videocart 21 - Bowling]]<br />
* [[Disassembly:Videocart 22|Videocart 22 - Slot Machine]]<br />
* [[Disassembly:Videocart 22b|Videocart 22b - Alt. Slot Machine]]<br />
* [[Disassembly:Videocart 23|Videocart 23 - Galactic Space Wars]]<br />
* [[Disassembly:Videocart 24|Videocart 24 - Pro Football]]<br />
* [[Disassembly:Videocart 25|Videocart 25 - Casino Poker]]<br />
* [[Disassembly:Videocart 26|Videocart 26 - Alien Invasion]]<br />
* [[Disassembly:SABA Videoplay 1|SABA Videoplay 1 - M&uuml;hle, usw]]<br />
* [[Disassembly:SABA Videoplay 16|SABA Videoplay 16 - Rat' mal]]<br />
* [[Disassembly:SABA Videoplay 20|SABA Videoplay 20 - Schach]]<br />
* [[Disassembly:Democart|Democart]]<br />
* [[Disassembly:Democart 2|Democart 2]]<br />
* [[Disassembly:Werbetextcassette electronic partner|Werbetextcassette electronic partner]]<br />
<br />
</div><br />
</div><br />
<br />
<div id="col2" style="width: 69%; float: left"><br />
<br />
== Contribute! ==<br />
<br />
The VESWiki was set up as a repository for information related to the VES and VES programming. Some of the many things we'd like to make available are disassemblies, console or technical information, tutorials and guides for both software and hardware, code snippets, and complete games. We encourage you to add any information you have, or to make a page promoting your own game (which you can host here, if you like).<br />
<br />
== Getting Started ==<br />
<br />
If you'd like to get started programming games for the Channel F, try downloading the <br>[https://channelf.se/veswiki/images/9/99/Devel.7z Development Pack (.7z, 2.8 MB)]. <br>It includes the DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game that you can edit, compile and test. Just unpack it, preferably directly on root of your hard drive and doubleclick '''..\devel\games\pacman\!compile+run.bat''' or the '''!run.bat''' in the same directory and it should start right up. Press Esc to leave the debugger. <br> It has been tested (and is working) on Windows XP Home SP3.<br><br><br />
Here's a tutorial that might be helpful: <br />
[[Tutorial:Beginner%27s_Guide_to_the_Channel_F | Beginner's guide to the Channel F]]<br />
<br>Read up on the guides and have fun!<br><br />
<br />
== Useful external links ==<br />
(all links working June 21st 2020)<br />
<br />
* [http://www.freelists.org/list/channelf Channel F Programming List]<br />
* [http://seanriddle.com/chanf.html Sean Riddle's Channel F Info]<br />
* [http://seanriddle.com/chanfmulti.html Sean Riddle's Channel F Multicart]<br />
* [http://seanriddle.com/chanfinfo.html Sean Riddle's Channel F Programming Info]<br />
* [http://www.nyx.net/~lturner/public_html/Fairchild_F8.html Lowell O. Turner's Home Page- Fairchild F8 Info]<br />
* [http://www.nyx.net/~lturner/public_html/F8_ins.html Lowell O. Turner's Home Page- Fairchild F8 Instruction Set]<br />
<br />
== Information in pdf:s ==<br />
<br />
Here are complete Guides in pdf format on how to program a F8 processor system: <br><br />
[https://channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming (.pdf, 3.42 MB)]<br><br />
[https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8 User's Guide (1976)(Fairchild) (.pdf, 13.8 MB)]<br />
<br />
These are a few shorter pdf:s with information on the F8 system and its circuits: <br><br />
[https://channelf.se/files/channelf/f8_general_info.pdf F8 general info (.pdf, 146kB)]<br />
<br><br />
[http://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)]<br><br />
<br />
[https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8 info by Terry Polhoff (.pdf, 698kB)]<br><br />
[http://channelf.se/files/channelf/f3851_56.pdf F3851+56 Program Storage Unit (.pdf, 1.5MB)]<br><br />
[https://channelf.se/files/channelf/f3852_53.pdf F3852+53 Dynamic and Static Memory Interface (.pdf, 720kB)]<br><br />
<br><br />
[https://channelf.se/veswiki/images/1/1d/Fairchild_Service_Manual.pdf Service manual, Repair information (.pdf, 409kB)]</div>E5frog