ROMC

To save on capsule pins the different parts in the F8 processor system communicates with the ROMC-bus.
Instead of an address bus each device has its own Program Counter (PC). The different states

ROMC Signal functions
ROMC 43210	HEX	Cycle length	Function
00000	00	S,L	Instruction Fetch. The device whose address space includes the contents of the PCO register must place on the data bus the op code addressed by PC0; then all devices increment the contents of PC0.
00001	01	L	The device whose address space includes the contents of the PCO register must place on the data bus the contents of the memory location addressed by PC0; then all devices add the 8-bit value on the data bus, as as signed binary number, to PC0.
00010	02	L	The device whose DC0 addresses a memory word within the address space of that device must place on the data bus the contents of the memory location addressed by DC0; then all devices increment DC0.
00011	03	L,S
00100	04	S
00101	05	L
00110	06	L
00111	07	L
01000	08	L
01001	09	L
01010	0A	L
01011	0B	L
01100	0C	L
01101	0D	S
01110	0E	L
01111	0F	L
10000	10	L
10001	11	L
10010	12	L
10011	13	L
10100	14	L
10101	15	L
10110	16	L
10111	17	L
11000	18	L
11001	19	L
11010	1A	L
11011	1B	L
11100	1C	L or S
11101	1D	S	Devices with DC0 and DC1 registers must switch registers. Devices without a DC1 register perform no operation.
11110	1E	L	The device whose address space includes the contents of PCO must place the low order byte of PCO onto the data bus.
11111	1F	L	The device whose address space includes the contents of PCO must place the high order byte of PCO onto the data bus.