Register

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There are two types of registers in the Channel F. The first type are the 64 bytes of RAM, located on the F8 itself, called the scratchpad registers. These can be used in mathematical computations or to store data. The second type of registers in the F8 are the working registers. These are the accumulator, ISAR, status register, data counter, and program counter, which are internal registers that fill certain roles in the F8.

The scratchpad registers can be accessed in one of two ways. The first way is to specify the number of the register, which can be from 0-11, or to use the register name where allowed (see below) to access registers 0-15. The registers 16-63 can't be accessed in this way, but can only be accessed via the ISAR. You can load the ISAR with two octal numbers specifying which of the 64 scratchpad registers you want to use.

Register Reference

Below is a table showing how registers can be accessed and transferred:

LR Instruction Operands Loads Register From Register With
Destination Source
A KU Accumulator Scratchpad register 12 8-bit contents
A KL Accumulator Scratchpad register 13 8-bit contents
A QU Accumulator Scratchpad register 14 8-bit contents
A QL Accumulator Scratchpad register 15 8-bit contents
KU A Scratchpad register 12 Accumulator 8-bit contents
KL A Scratchpad register 13 Accumulator 8-bit contents
QU A Scratchpad register 14 Accumulator 8-bit contents
QL A Scratchpad register 15 Accumulator 8-bit contents
K P

Scratchpad register 12
Scratchpad register 13

Program counter PC1
Program counter PC1

High order 8-bit byte
Low order 8-bit byte

P K

High order byte of PC1
Low order byte of PC1

Scratchpad register 12
Scratchpad register 13

8-bit contents 8-bit contents

A IS Accumulator ISAR Low order 6-bits
IS A   Accumulator

00XXXXXX
X's are ISAR contents

P0 Q

High order byte of PC0
Low order byte of PC0

Scratchpad register 14
Scratchpad register 15

8-bit contents
8-bit contents

Q DC

Scratchpad register 14
Scratchpad register 15

Data counter registers DC0
Data counter registers DC0

High order byte
Low order byte

DC Q

High order byte of DC0
Low order byte of DC0

Scratchpad register 14
Scratchpad register 15

8-bit contents
8-bit contents

DC H

High order byte of DC0
Low order byte of DC0

Scratchpad register 10
Scratchpad register 11

8-bit contents
8-bit contents

H DC

Scratchpad register
Scratchpad register

Data counter register
Data counter register

High order byte
Low order byte

W J Status register (W) Scratchpad register 9 Low order 5 bits
J W Scratchpad register 9 Status register (W)

000X XXXX
X's are contents of status register

A (Sreg)* Accumulator Scratchpad register (Sreg) 8-bit contents
(Sreg)* A Scratchpad register (Sreg) Accumulator 8-bit contents

* Sreg is either a digit representing a scratchpad register (0-15), or the letter S, I (increase) or D (decrease) for the ISAR addressed register. Instead of using S, I or D, you can also use 12, 13 or 14. Note that these letters don't adress scratchpad registers 12, 13 or 14, but is an alternative to S, I or D.