Register - Revision history

E5frog at 13:32, 5 November 2013

2013-11-05T13:32:13Z

E5frog at 11:04, 5 November 2013

2013-11-05T11:04:28Z

E5frog at 11:00, 5 November 2013

2013-11-05T11:00:58Z

E5frog: 1 revision

2012-11-16T21:23:36Z

1 revision

Admin at 03:59, 14 August 2007

2007-08-14T03:59:02Z

New page

There are two types of registers in the Channel F. The first type are the 64 bytes of [[RAM]], located on the [[F8]] itself, called the [[scratchpad registers]]. These can be used in mathematical computations or to store data. The second type of registers in the F8 are the working registers. These are the [[accumulator]], [[ISAR]], [[status register]], [[data counter]], and [[program counter]], which are internal registers that fill certain roles in the F8.

The scratchpad registers can be accessed in one of two ways. The first way is to specify the number of the register, which can be from 0-11, or to use the register name where allowed ''(see below)'' to access registers 0-15. The registers 16-63 can't be accessed in this way, but can only be accessed via the '''ISAR'''. You can load the ISAR with two octal numbers specifying which of the 64 scratchpad registers you want to use.

== Register Reference ==

Below is a table showing how registers can be accessed and transferred:

<table border="1" cellspacing="1" cellpadding="4" style="width: 75%">

<tr>
<th colspan="2">''LR'' Instruction Operands</th>
<th rowspan="2">Loads Register</th>
<th rowspan="2">From Register</th>

<th rowspan="2">With</th>
</tr>

<tr>
<th>Destination</th>

<th>Source</th>
</tr>

<tr>
<td>A</td>

<td>KU</td>
<td>Accumulator</td>
<td>Scratchpad register 12</td>
<td>8-bit contents</td>

</tr>

<tr>
<td>A</td>
<td>KL</td>

<td>Accumulator</td>
<td>Scratchpad register 13</td>
<td>8-bit contents</td>
</tr>

<tr>
<td>A</td>
<td>QU</td>
<td>Accumulator</td>

<td>Scratchpad register 14</td>
<td>8-bit contents</td>
</tr>

<tr>

<td>A</td>
<td>QL</td>
<td>Accumulator</td>
<td>Scratchpad register 15</td>

<td>8-bit contents</td>
</tr>

<tr>
<td>KU</td>

<td>A</td>
<td>Scratchpad register 12</td>
<td>Accumulator</td>
<td>8-bit contents</td>

</tr>

<tr>
<td>KL</td>
<td>A</td>

<td>Scratchpad register 13</td>
<td>Accumulator</td>
<td>8-bit contents</td>
</tr>

<tr>
<td>QU</td>
<td>A</td>
<td>Scratchpad register 14</td>

<td>Accumulator</td>
<td>8-bit contents</td>
</tr>

<tr>

<td>QL</td>
<td>A</td>
<td>Scratchpad register 15</td>
<td>Accumulator</td>

<td>8-bit contents</td>
</tr>

<tr>
<td>K</td>

<td>P</td>
<td>
Scratchpad register 12 
Scratchpad register 13
</td>
<td>

Program counter PC1 
Program counter PC1
</td>
<td>
High order 8-bit byte 
Low order 8-bit byte
</td>
</tr>

<tr>
<td>P</td>
<td>K</td>
<td>

High order byte of PC1 
Low order byte of PC1
</td>
<td>
Scratchpad register 12 
Scratchpad register 13
</td>
<td>

8-bit contents
8-bit contents
</td>
</tr>

<tr>
<td>A</td>
<td>IS</td>

<td>Accumulator</td>
<td>ISAR</td>
<td>Low order 6-bits</td>
</tr>

<tr>
<td>IS</td>
<td>A</td>
<td> </td>

<td>Accumulator</td>
<td>
00XXXXXX 
X's are ISAR contents
</td>
</tr>

<tr>
<td>P0</td>
<td>Q</td>
<td>

High order byte of PC0 
Low order byte of PC0
</td>
<td>
Scratchpad register 14 
Scratchpad register 15
</td>
<td>

8-bit contents 
8-bit contents
</td>
</tr>

<tr>
<td>Q</td>

<td>DC</td>
<td>
Scratchpad register 14 
Scratchpad register 15
</td>
<td>

Data counter registers DC0 
Data counter registers DC0
</td>
<td>
High order byte 
Low order byte
</td>
</tr>

<tr>
<td>DC</td>
<td>Q</td>
<td>

High order byte of DC0 
Low order byte of DC0
</td>
<td>
Scratchpad register 14 
Scratchpad register 15
</td>
<td>

8-bit contents 
8-bit contents
</td>
</tr>

<tr>
<td>DC</td>

<td>H</td>
<td>
High order byte of DC0 
Low order byte of DC0
</td>
<td>

Scratchpad register 10 
Scratchpad register 11
</td>
<td>
8-bit contents 
8-bit contents
</td>
</tr>

<tr>
<td>H</td>
<td>DC</td>
<td>

Scratchpad register 
Scratchpad register
</td>
<td>
Data counter register 
Data counter register
</td>
<td>

High order byte 
Low order byte
</td>
</tr>

<tr>
<td>W</td>

<td>J</td>
<td>Status register (W)</td>
<td>Scratchpad register 9</td>
<td>Low order 5 bits</td>

</tr>

<tr>
<td>J</td>
<td>W</td>

<td>Scratchpad register 9</td>
<td>Status register (W)</td>
<td>
000X XXXX 
X's are contents of status register
</td>

</tr>

<tr>
<td>A</td>
<td>(Sreg)*</td>

<td>Accumulator</td>
<td>Scratchpad register (Sreg)</td>
<td>8-bit contents</td>
</tr>

<tr>
<td>(Sreg)*</td>
<td>A</td>
<td>Scratchpad register (Sreg)</td>

<td>Accumulator</td>
<td>8-bit contents</td>
</tr>
</table>

''* Sreg is either a digit representing a scratchpad register (0-15), or the letter S, I (increase) or D (decrease) for the ISAR addressed register. Instead of using S, I or D, you can also use 12, 13 or 14. Note that these letters don't adress scratchpad registers 12, 13 or 14, but is an alternative to S, I or D.''

@@ Line 1: / Line 1: @@
 There are two types of registers in the Channel F. The first type are the 64 bytes of [[RAM]], located on the [[F8]] itself, called the [[scratchpad registers]]. These can be used in mathematical computations or to store data. The second type of registers in the F8 are the working registers. These are the [[accumulator]], [[ISAR]], [[status register]], [[data counter]], and [[program counter]], which are internal registers that fill certain roles in the F8.
-The scratchpad registers can be accessed in one of two ways. The first way is to specify the number of the register, which can be from 0-11, or to use the register name where allowed ''(see below)'' to access registers 12-15 directly. Registers 16-63 can't be accessed in this direct manner but can only be accessed via the '''ISAR'''. You can load the ISAR with two octal numbers specifying which of the 64 scratchpad registers you want to use. Register 16-23 has the octal address 20-27, register 24-31 are octal 30-37, etc until the last one that is octal 77 (register 63, the 64th register).
+The scratchpad registers can be accessed in one of two ways. The first way is to specify the number of the register, which can be from 0-11, or to use the register name where allowed ''(see below)'' to access registers directly. Numbers 12, 13 and 14 are used to address ISAR and is the same as S, I and D which means ISAR directly, ISAR and then increased and finally ISAR that is then decreased, these numbers are not used to address registers 12,13 and 14.
 == Register Reference ==

@@ Line 1: / Line 1: @@
 There are two types of registers in the Channel F. The first type are the 64 bytes of [[RAM]], located on the [[F8]] itself, called the [[scratchpad registers]]. These can be used in mathematical computations or to store data. The second type of registers in the F8 are the working registers. These are the [[accumulator]], [[ISAR]], [[status register]], [[data counter]], and [[program counter]], which are internal registers that fill certain roles in the F8.
-The scratchpad registers can be accessed in one of two ways. The first way is to specify the number of the register, which can be from 0-11, or to use the register name where allowed ''(see below)'' to access registers 12-15. Registers 16-63 can't be accessed in this direct manner but can only be accessed via the '''ISAR'''. You can load the ISAR with two octal numbers specifying which of the 64 scratchpad registers you want to use.
+The scratchpad registers can be accessed in one of two ways. The first way is to specify the number of the register, which can be from 0-11, or to use the register name where allowed ''(see below)'' to access registers 12-15 directly. Registers 16-63 can't be accessed in this direct manner but can only be accessed via the '''ISAR'''. You can load the ISAR with two octal numbers specifying which of the 64 scratchpad registers you want to use. Register 16-23 has the octal address 20-27, register 24-31 are octal 30-37, etc until the last one that is octal 77 (register 63, the 64th register).
 == Register Reference ==

← Older revision	Revision as of 21:23, 16 November 2012
(No difference)