Difference between revisions of "Port"
| Line 3: | Line 3: | ||
<br> | <br> | ||
<br> | <br> | ||
| − | == CPU port 0 == | + | == '''CPU port 0''' == |
0 TIME console button<br> | 0 TIME console button<br> | ||
1 MODE console button<br> | 1 MODE console button<br> | ||
| Line 14: | Line 14: | ||
<br> | <br> | ||
| − | == CPU port 1 == | + | == '''CPU port 1''' == |
0 Right controller right<br> | 0 Right controller right<br> | ||
1 Right controller left<br> | 1 Right controller left<br> | ||
| Line 30: | Line 30: | ||
7 Write Data1, Indicates that valid data is present for both VRAM ODD1 and EVEN1<br> | 7 Write Data1, Indicates that valid data is present for both VRAM ODD1 and EVEN1<br> | ||
| − | == PSU port 4 == | + | == '''PSU port 4''' == |
Port 4 has double duties and serve left controller <br> | Port 4 has double duties and serve left controller <br> | ||
| Line 57: | Line 57: | ||
<br> | <br> | ||
| − | == PSU port 5 == | + | == '''PSU port 5''' == |
Port 5 serves the vertical video position (Y-coordinate) and also sound. | Port 5 serves the vertical video position (Y-coordinate) and also sound. | ||
| Line 71: | Line 71: | ||
<br> | <br> | ||
| − | == | + | == Other ports == |
| − | + | === 3852 ports $0C and $0D === | |
| − | + | These ports on the 3852 DMI are used to enable direct data transfer between memory devices and external devices and also requires a 3854 DMA chip to be present. | |
| + | Transfer requires a control byte in port $0C. | ||
| − | + | === 3853 ports $0C and $0D === | |
| − | == VC-18 port $20 and $21 == | + | On the 3853 these two ports are used as programmable interrupt vector registers. |
| + | You can't use the plain 3852 and the 3853 at the same time, instead use the SL31116 if needed. | ||
| + | |||
| + | === 3853 ports $0E and $0F === | ||
| + | |||
| + | The 3853 Static Memory Interface uses port $0E as interrupt control port and port $0F as a local timer port. | ||
| + | |||
| + | === VC-18 port $20 and $21 === | ||
Used to save data in a 1kx1 2012 RAM in Videocart 18 | Used to save data in a 1kx1 2012 RAM in Videocart 18 | ||
| − | == VC-10 port $24 and $25 == | + | === VC-10 port $24 and $25 === |
Used to save data in 1kx1 2102 RAM in Videocart 10 | Used to save data in 1kx1 2102 RAM in Videocart 10 | ||
| − | == 3854 port $F0 to $FF == | + | === 3852 ports $EC and $ED === |
| + | The 3852 DMI type referred to as SL31116 uses these ports instead of $0C and $0D | ||
| + | |||
| + | === 3854 port $F0 to $FF === | ||
| + | |||
The 3854 DMA device each has three internal registers adressed as four separate I/O-ports. | The 3854 DMA device each has three internal registers adressed as four separate I/O-ports. | ||
Registers are called BUFA, BUFB, BUFC and BUFD where BUFA and BUFB represents address, BUFC represents byte count that also uses four bits from BUFD. Last four bits are used for function code. | Registers are called BUFA, BUFB, BUFC and BUFD where BUFA and BUFB represents address, BUFC represents byte count that also uses four bits from BUFD. Last four bits are used for function code. | ||
Latest revision as of 17:44, 25 August 2024
The VES has four usable 8-bit data ports in the console, port 0 and 1 that are in the 3850 CPU and port 4 and 5 on one of the 3851 Program Storage Units. These I/O:s are hooked to specific functions as shown in the table below.
When looking at the opcodes we'll see that using the two ports on the CPU requires half the CPU time compared to using Port 4 and 5 on the PSU, this means that you can fetch right hand controller data two cycles faster than from left one which is worth noting if you need to maximize speed.
Contents
CPU port 0
0 TIME console button
1 MODE console button
2 HOLD console button
3 START console button
4 - not connected -
5 RAM WRT - A pulse here executes a write to Video RAM.
6 Enable data from controllers, set to 1 while write to Video RAM.
7 - not connected -
CPU port 1
0 Right controller right
1 Right controller left
2 Right controller back
3 Right controller forward
4 Right controller counter clockwise
5 Right controller clockwise
6 Right controller pull
7 Right controller push
Two bits have a second function, they decide the color of a plotted pixel:
6 Write Data0, Indicates that valid data is present for both VRAM ODD0 and EVEN0
7 Write Data1, Indicates that valid data is present for both VRAM ODD1 and EVEN1
PSU port 4
Port 4 has double duties and serve left controller
as well as horizontal video position (X-coordinate).
0 Left controller right
1 Left controller left
2 Left controller back
3 Left controller forward
4 Left controller counter clockwise
5 Left controller clockwise
6 Left controller pull
7 Left controller push
Also:
0 Video Select
1 Video Horizontal A
2 Video Horizontal B
3 Video Horizontal C
4 Video Horizontal D
5 Video Horizontal E
6 Video Horizontal F
7
PSU port 5
Port 5 serves the vertical video position (Y-coordinate) and also sound.
0 Video Vertical A
1 Video Vertical B
2 Video Vertical C
3 Video Vertical D
4 Video Vertical E
5 Video Vertical F
6 Tone AN (beep sound)
7 Tone BN (beep sound)
Other ports
3852 ports $0C and $0D
These ports on the 3852 DMI are used to enable direct data transfer between memory devices and external devices and also requires a 3854 DMA chip to be present. Transfer requires a control byte in port $0C.
3853 ports $0C and $0D
On the 3853 these two ports are used as programmable interrupt vector registers. You can't use the plain 3852 and the 3853 at the same time, instead use the SL31116 if needed.
3853 ports $0E and $0F
The 3853 Static Memory Interface uses port $0E as interrupt control port and port $0F as a local timer port.
VC-18 port $20 and $21
Used to save data in a 1kx1 2012 RAM in Videocart 18
VC-10 port $24 and $25
Used to save data in 1kx1 2102 RAM in Videocart 10
3852 ports $EC and $ED
The 3852 DMI type referred to as SL31116 uses these ports instead of $0C and $0D
3854 port $F0 to $FF
The 3854 DMA device each has three internal registers adressed as four separate I/O-ports. Registers are called BUFA, BUFB, BUFC and BUFD where BUFA and BUFB represents address, BUFC represents byte count that also uses four bits from BUFD. Last four bits are used for function code.
